Yasuhiko Hagihara

Publication Activity (10 Years)

Years Active: 1997-2019
Publications (10 Years): 3

Top Topics

Top Venues

IEICE Trans. Electron.

Publications

Takahiro Nakamura, Kenichiro Yashiki, Kenji Mizutani, Takaaki Nedachi, Junichi Fujikata, Masatoshi Tokushima, Jun Ushida, Masataka Noguchi, Daisuke Okamoto, Yasuyuki Suzuki, Takanori Shimizu, Koichi Takemura, Akio Ukita, Yasuhiro Ibusuki, Mitsuru Kurihara, Keizo Kinoshita, Tsuyoshi Horikawa, Hiroshi Yamaguchi, Junichi Tsuchida, Yasuhiko Hagihara, Kazuhiko Kurata
Fingertip-Size Optical Module, "Optical I/O Core", and Its Application in FPGA. IEICE Trans. Electron. (4) (2019)
Kenichiro Yashiki, Toshinori Uemura, Mitsuru Kurihara, Yasuyuki Suzuki, Masatoshi Tokushima, Yasuhiko Hagihara, Kazuhiko Kurata
25-Gbps/ch Error-Free Operation over 300-m MMF of Low-Power-Consumption Silicon-Photonics-Based Chip-Scale Optical I/O Cores. IEICE Trans. Electron. (2) (2016)
Kenichiro Yashiki, Kenji Mizutani, Jun Ushida, Yasuyuki Suzuki, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Yasuhiko Hagihara, Kazuhiko Kurata
25-Gbps error-free operation of chip-scale Si-photonics optical transmitter over 70°C with integrated quantum dot laser. OFC (2016)
Kenji Mizutani, Kenichiro Yashiki, Mitsuru Kurihara, Yasuyuki Suzuki, Yasuhiko Hagihara, Nobuaki Hatori, Takanori Shimizu, Yutaka Urino, Takahiro Nakamura, Kazuhiko Kurata, Yasuhiko Arakawa
Optical I/O core transmitter with high tolerance to optical feedback using quantum dot laser. ECOC (2015)
Kenichiro Yashiki, Yasuyuki Suzuki, Yasuhiko Hagihara, Mitsuru Kurihara, Masatoshi Tokushima, Junichi Fujikata, Akio Ukita, Koichi Takemura, Takanori Shimizu, Daisuke Okamoto, Jun Ushida, Shigeki Takahashi, Toshinori Uemura, Makoto Okano, Junichi Tsuchida, Takaaki Nedachi, Makoto Fushimi, Ichiro Ogura, Jun Inasaka, Kazuhiko Kurata
5 mW/Gbps hybrid-integrated Si-photonics-based optical I/O cores and their 25-Gbps/ch error-free operation with over 300-m MMF. OFC (2015)
Yoshifumi Ikenaga, Masahiro Nomura, Yoetsu Nakazawa, Yasuhiko Hagihara
A Circuit for Determining the Optimal Supply Voltage to Minimize Energy Consumption in LSI Circuit Operations. IEEE J. Solid State Circuits 43 (4) (2008)
Koichi Takeda, Hidetoshi Ikeda, Yasuhiko Hagihara, Masahiro Nomura, Hiroyuki Kobatake
Redefinition of Write Margin for Next-Generation SRAM and Write-Margin Monitoring Circuit. ISSCC (2006)
Masahiro Nomura, Taku Ohsawa, Koichi Takeda, Yoetsu Nakazawa, Yoshinori Hirota, Yasuhiko Hagihara, Naoki Nishi
An Automatic Bi-Directional Bus Repeater Control Scheme Using Dynamic Collaborative Driving Techniques. IEICE Trans. Electron. (3) (2006)
Masahiro Nomura, Yoshifumi Ikenaga, Koichi Takeda, Yoetsu Nakazawa, Yoshiharu Aimoto, Yasuhiko Hagihara
Delay and power monitoring schemes for minimizing power consumption by means of supply and threshold voltage control in active and standby modes. IEEE J. Solid State Circuits 41 (4) (2006)
Ko Yoshikawa, Shigeto Inui, Yasuhiko Hagihara, Yuichi Nakamura, Takeshi Yoshimura
Domino Logic Synthesis System and its Applications. J. Circuits Syst. Comput. 15 (2) (2006)
Koichi Takeda, Yasuhiko Hagihara, Yoshiharu Aimoto, Masahiro Nomura, Yoetsu Nakazawa, Toshio Ishii, Hiroyuki Kobatake
A read-static-noise-margin-free SRAM cell for low-VDD and high-speed applications. IEEE J. Solid State Circuits 41 (1) (2006)
Ko Yoshikawa, Yasuhiko Hagihara, Keisuke Kanamaru, Yuichi Nakamura, Shigeto Inui, Takeshi Yoshimura
Timing optimization by replacing flip-flops to latches. ASP-DAC (2004)
Yasuhiko Hagihara, Shigeto Inui, Fuyuki Okamoto, Masato Nishida, Toshihiko Nakamura, Hachiro Yamada
Floating-point datapaths with online built-in self speed test. IEEE J. Solid State Circuits 32 (3) (1997)