25-Gbps/ch Error-Free Operation over 300-m MMF of Low-Power-Consumption Silicon-Photonics-Based Chip-Scale Optical I/O Cores.
Kenichiro YashikiToshinori UemuraMitsuru KuriharaYasuyuki SuzukiMasatoshi TokushimaYasuhiko HagiharaKazuhiko KurataPublished in: IEICE Trans. Electron. (2016)
Keyphrases
- low power consumption
- error free
- low cost
- low power
- storage devices
- power consumption
- real time
- high speed
- single chip
- error prone
- cmos technology
- digital camera
- error resilient
- application specific
- file system
- liquid crystal
- security mechanisms
- solid state
- processing capabilities
- embedded systems
- image sensor
- field programmable gate array
- general purpose