William A. Rogers

Publication Activity (10 Years)

Years Active: 1985-1999
Publications (10 Years): 0

Publications

Sanghyeon Baeg, William A. Rogers
A cost-effective design for testability: clock line control and test generation using selective clocking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 18 (6) (1999)
Sanghyeon Baeg, William A. Rogers
A New Test Generation Methodology Using Selective Clocking for the Clock Line Controlled Circuits. ICCD (1994)
Sanghyeon Baeg, William A. Rogers
Hybrid Design for Testability Combining Scan and Clock Line Control and Method for Test Generation. ITC (1994)
Hyoung B. Min, Hwei-Tsu Ann Luh, William A. Rogers
Hierarchical test pattern generation: a cost model and implementation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (7) (1993)
Hyoung B. Min, William A. Rogers
A test methodology for finite state machines using partial scan design. J. Electron. Test. 3 (2) (1992)
Mark A. Heap, William A. Rogers, M. Ray Mercer
A Synthesis Algorithm for Two-Level XOR Based Circuits. ICCD (1992)
Mark D. Sloan, William A. Rogers, Srihari Shoroff
The Impedance Fault Model and Design for Robust Impedance Fault Testability. ICCAD (1991)
Mark A. Heap, William A. Rogers, William B. Burns
STarS: a target switching algorithm for sequential test generation. VTS (1991)
Hyoung B. Min, William A. Rogers
Search strategy switching: A cost model and an analysis of backtracking. J. Electron. Test. 1 (2) (1990)
Hyoung B. Min, William A. Rogers
Search Strategy Switching: An Alternative to Increased Backtracking. ITC (1989)
Mark A. Heap, William A. Rogers
Generating Single-Stuck-Fault Coverage from a Collapsed-Fault Set. Computer 22 (4) (1989)
Hyoung B. Min, William A. Rogers, Hwei-Tsu Ann Luh
FANHAT: fanout oriented hierarchical automatic test generation system. ICCAD (1989)
Patrick A. Duba, Rabindra K. Roy, Jacob A. Abraham, William A. Rogers
Fault Simulation in a Distributed Environment. DAC (1988)
William A. Rogers, John F. Guzolek, Jacob A. Abraham
Concurrent Hierarchical Fault Simulation: A Performance Model and Two Optimizations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 6 (5) (1987)
Hongtao P. Chang, William A. Rogers, Jacob A. Abraham
Structured Functional Level Test Generation Using Binary Decision Diagrams. ITC (1986)
William A. Rogers, Jacob A. Abraham
High level hierarchical fault simulation techniques. ACM Conference on Computer Science (1985)
William A. Rogers, Jacob A. Abraham
CHIEFS : A Concurrent, Hierarchical and Extensible Fault Simulator. ITC (1985)