Tim Kogel

Publication Activity (10 Years)

Years Active: 2001-2022
Publications (10 Years): 4

Top Topics

Interconnection Networks

Analytical Models

Top Venues

IEEE J. Emerg. Sel. Topics Circuits Syst.

Int. J. Parallel Program.

Publications

Niko Zurstraßen, Lukas Jünger, Tim Kogel, Holger Keding, Rainer Leupers
AMAIX In-Depth: A Generic Analytical Model for Deep Learning Accelerators. Int. J. Parallel Program. 50 (2) (2022)
Lukas Jünger, Niko Zurstraßen, Tim Kogel, Holger Keding, Rainer Leupers
AMAIX: A Generic Analytical Model for Deep Learning Accelerators. SAMOS (2020)
Seyed Morteza Nabavinejad, Mohammad Baharloo, Kun-Chih Chen, Maurizio Palesi, Tim Kogel, Masoumeh Ebrahimi
An Overview of Efficient Interconnection Networks for Deep Neural Network Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 10 (3) (2020)
Kun-Chih Chen, Masoumeh Ebrahimi, Maurizio Palesi, Tim Kogel
Guest Editorial: Communication-Aware Designs and Methodologies for Reliable and Adaptable On-Chip AI SubSystems and Accelerators. IEEE J. Emerg. Sel. Topics Circuits Syst. 10 (3) (2020)
Rainer Leupers, Grant Martin, Roman Plyaskin, Andreas Herkersdorf, Frank Schirrmeister, Tim Kogel, Martin Vaupel
Virtual platforms: Breaking new grounds. DATE (2012)
Tor E. Jeremiassen, Tim Kogel, Andrés Takach, Grant Martin, Adam Donlin, Karamvir Chatha
From ESL 2010 to ESL 2015. CODES+ISSS (2010)
Ruchir Puri, Eshel Haritan, Stan Krolikoski, Jason Cong, Tim Kogel, Bradley D. McCredie, John Shen, Andrés Takach
From milliwatts to megawatts: system level power challenge. DAC (2009)
Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr
Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. Int. J. Embed. Syst. 3 (3) (2008)
Hiroyuki Yagi, Wolfgang Roesner, Tim Kogel, Eshel Haritan, Hidekazu Tangi, Michael McNamara, Gary Smith, Nikil D. Dutt, Giovanni Mancini
ESL hand-off: fact or EDA fiction? DAC (2008)
Eugenio Villar, Axel Jantsch, Christoph Grimm, Tim Kogel
Heterogeneous System-level Specification Using SystemC. DATE (2008)
Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. Int. J. Embed. Syst. 3 (3) (2008)
Tim Kogel, Matthew Braun
Virtual prototyping of embedded platforms for wireless and multimedia. DATE (2006)
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel
Retargetable generation of TLM bus interfaces for MP-SoC platforms. CODES+ISSS (2005)
Oliver Schliebusch, Anupam Chattopadhyay, David Kammler, Gerd Ascheid, Rainer Leupers, Heinrich Meyr, Tim Kogel
A framework for automated and optimized ASIP implementation supporting multiple hardware description languages. ASP-DAC (2005)
Tim Kogel, Anssi Haverinen
OCP TLM for Architectural Modelling. FDL (2005)
Torsten Kempf, Malte Doerper, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tim Kogel, Bart Vanthournout
A Modular Simulation Framework for Spatial and Temporal Task Mapping onto Multi-Processor SoC Platforms. DATE (2005)
Manuel Hohenauer, Hanno Scharwächter, Kingshuk Karuri, Oliver Wahlen, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Hans van Someren
A Methodology and Tool Suite for C Compiler Generation from ADL Processor Models. DATE (2004)
Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. DATE (2004)
Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS (2004)
Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Early ISS Integration into Network-on-Chip Designs. SAMOS (2004)
Tim Kogel, Heinrich Meyr
Heterogeneous MP-SoC: the solution to energy-efficient signal processing. DAC (2004)
Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens
A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS (2003)
Manoj Ariyamparambath, Denis Bussaglia, Bernd Reinkemeier, Tim Kogel, Torsten Kempf
A highly efficient modeling style for heterogeneous bus architectures. SoC (2003)
Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann
Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization. ASAP (2003)
Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (11) (2001)
Andreas Hoffmann, Tim Kogel, Heinrich Meyr
A framework for fast hardware-software co-simulation. DATE (2001)