Andreas Wieferink

Publication Activity (10 Years)

Years Active: 2001-2008
Publications (10 Years): 0

RWTH Aachen University (PHD)

Education History

RWTH Aachen University

PHD

Publications

Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Heinrich Meyr
Virtual architecture mapping: a SystemC based methodology for architectural exploration of System-on-Chips. Int. J. Embed. Syst. 3 (3) (2008)
Andreas Wieferink, Tim Kogel, Olaf Zerres, Rainer Leupers, Heinrich Meyr
SoC multiprocessor debugging and synchronisation using generic dynamic-connect debugger frontends. Int. J. Embed. Syst. 3 (3) (2008)
Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
ASIP architecture exploration for efficient IPSec encryption: A case study. ACM Trans. Embed. Comput. Syst. 6 (2) (2007)
Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Tom Michiels, Achim Nohl, Tim Kogel
Retargetable generation of TLM bus interfaces for MP-SoC platforms. CODES+ISSS (2005)
Andreas Wieferink, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Gunnar Braun, Achim Nohl
A System Level Processor/Communication Co-Exploration Methodology for Multi-Processor System-on-Chip Platform. DATE (2004)
Tim Kogel, Malte Doerper, Torsten Kempf, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Virtual Architecture Mapping: A SystemC Based Methodology for Architectural Exploration of System-on-Chip Designs. SAMOS (2004)
Hanno Scharwächter, David Kammler, Andreas Wieferink, Manuel Hohenauer, Kingshuk Karuri, Jianjiang Ceng, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
ASIP Architecture Exploration for Efficient Ipsec Encryption: A Case Study. SCOPES (2004)
Andreas Wieferink, Malte Doerper, Tim Kogel, Rainer Leupers, Gerd Ascheid, Heinrich Meyr
Early ISS Integration into Network-on-Chip Designs. SAMOS (2004)
Gunnar Braun, Andreas Wieferink, Oliver Schliebusch, Rainer Leupers, Heinrich Meyr, Achim Nohl
Processor/Memory Co-Exploration on Multiple Abstraction Levels. DATE (2003)
Tim Kogel, Malte Doerper, Andreas Wieferink, Rainer Leupers, Gerd Ascheid, Heinrich Meyr, Serge Goossens
A modular simulation framework for architectural exploration of on-chip interconnection networks. CODES+ISSS (2003)
Andreas Wieferink, Tim Kogel, Achim Nohl, Andreas Hoffmann
Generic Tool-Set for SoC Mulitiprocessor Debugging and Synchronization. ASAP (2003)
Andreas Hoffmann, Tim Kogel, Achim Nohl, Gunnar Braun, Oliver Schliebusch, Oliver Wahlen, Andreas Wieferink, Heinrich Meyr
A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 20 (11) (2001)

Andreas Wieferink.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

Andreas Wieferink