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Taavi Viilukas
Publication Activity (10 Years)
Years Active: 2006-2012
Publications (10 Years): 0
Top Topics
Circuit Design
Endpoints
Fault Detection
Built In Self Test
Top Venues
J. Electron. Test.
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Publications
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Taavi Viilukas
,
Anton Karputkin
,
Jaan Raik
,
Maksim Jenihhin
,
Raimund Ubar
,
Hideo Fujiwara
Identifying Untestable Faults in Sequential Circuits Using Test Path Constraints.
J. Electron. Test.
28 (4) (2012)
Taavi Viilukas
,
Maksim Jenihhin
,
Jaan Raik
,
Raimund Ubar
,
Samary Baranov
Automated test bench generation for high-level synthesis flow ABELITE.
EWDTS
(2011)
Jaan Raik
,
Anna Rannaste
,
Maksim Jenihhin
,
Taavi Viilukas
,
Raimund Ubar
,
Hideo Fujiwara
Constraint-Based Hierarchical Untestability Identification for Synchronous Sequential Circuits.
ETS
(2011)
Taavi Viilukas
,
Jaan Raik
,
Maksim Jenihhin
,
Raimund Ubar
,
Anna Krivenko
Constraint-based test pattern generation at the Register-Transfer Level.
DDECS
(2010)
Jaan Raik
,
Raimund Ubar
,
Taavi Viilukas
,
Maksim Jenihhin
Mixed hierarchical-functional fault models for targeting sequential cores.
J. Syst. Archit.
54 (3-4) (2008)
Jaan Raik
,
Raimund Ubar
,
Taavi Viilukas
High-Level Decision Diagram based Fault Models for Targeting FSMs.
DSD
(2006)