Sohaib Majzoub

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 17

Top Topics

Hardware Implementation

Advanced Encryption Standard

Breast Cancer Detection

Initial Conditions

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Circuits Syst. Signal Process.

Publications

Ahmed S. Elwakil, Anis Allagui, Ahmed Ibrahim El-Mesady, Amr Elsonbaty, Sohaib Majzoub, Brent J. Maundy
Chaos in Inter-State-Controlled RLC Networks. IEEE Trans. Circuits Syst. II Express Briefs 71 (1) (2024)
Basma Alsaid, Romaissa Berrim, Tracy Sarofil, Sohaib Majzoub, Abir Jaafar Hussain
Using Electrical Impedance Tomography and Machine Learning for Breast Cancer Detection. DeSE (2023)
Sohaib Majzoub, Ahmed Fahmy, Fadi N. Sibai, Maha Diab, Soliman Mahmoud
Epilepsy Detection with Multi-channel EEG Signals Utilizing AlexNet. Circuits Syst. Signal Process. 42 (11) (2023)
M. El-Badi, Ahmed S. Elwakil, Sohaib Majzoub
Fast Electrochemical Impedance Measurement and Classification System Based on Machine Learning Algorithms. ICECS (2023)
M. El-Badi, Ahmed S. Elwakil, Sohaib Majzoub
Impedance Measurement Using Wide-Band Signals. ICECS 2022 (2022)
Fadi N. Sibai, Ali El-Moursy, Abu Asaduzzaman, Sohaib Majzoub
Hardware Acceleration of the STRIKE String Kernel Algorithm for Estimating Protein to Protein Interactions. IEEE ACM Trans. Comput. Biol. Bioinform. 19 (4) (2022)
Ali A. El-Moursy, Abdollah Masoud Darya, Sohaib Majzoub, Ahmed S. Elwakil
Using Non-Autonomous Chaotic Clocks to Drive CPA-Resistant AES Cryptographic Chips. IEEE Trans. Circuits Syst. II Express Briefs 69 (9) (2022)
Ali A. El-Moursy, Abdollah Masoud Darya, Ahmed S. Elwakil, Abhinand Jha, Sohaib Majzoub
Chaotic Clock Driven Cryptographic Chip: Towards a DPA Resistant AES Processor. IEEE Trans. Emerg. Top. Comput. 10 (2) (2022)
Sohaib Majzoub, Anis Allagui, Ahmed S. Elwakil
Time-Frequency Design of a Multi-Sine Excitation With Random Phase and Controllable Amplitude for (Bio) Impedance Measurements. IEEE Access 10 (2022)
Sohaib Majzoub, Resve A. Saleh, Mottaqiallah Taouil, Said Hamdioui, Mohamed Bamakhrama
Rapid Design-Space Exploration for Low-Power Manycores Under Process Variation Utilizing Machine Learning. IEEE Access 10 (2022)
Manar AbuTalib, Sohaib Majzoub, Qassim Nasir, Dina J. Hejji
A systematic literature review on hardware implementation of artificial intelligence algorithms. J. Supercomput. 77 (2) (2021)
Ahmed S. Elwakil, Mohammed E. Fouda, Sohaib Majzoub, Ahmed G. Radwan
Pinched hysteresis loops in non-linear resonators. IET Circuits Devices Syst. 15 (2) (2021)
Ahmed S. Elwakil, Mohamed E. Fouda, Sohaib Majzoub, Ahmed G. Radwan
Pinched Hysteresis Loops In Nonlinear Resonators. CoRR (2020)
Talal Bonny, Ridhwan Al Debsi, Sohaib Majzoub, Ahmed S. Elwakil
Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators. Circuits Syst. Signal Process. 38 (3) (2019)
Sohaib Majzoub, Resve A. Saleh, Imran Ashraf, Mottaqiallah Taouil, Said Hamdioui
Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era. IEEE Access 7 (2019)
Issam W. Damaj, Sohaib Majzoub, Hassan B. Diab
2D and 3D Computer Graphics Algorithms under MorphoSys. CoRR (2019)
Sohaib Majzoub, Mottaqiallah Taouil, Said Hamdioui
System-Level Sub-20 nm Planar and FinFET CMOS Delay Modelling for Supply and Threshold Voltage Scaling Under Process Variation. J. Low Power Electron. 15 (1) (2019)
Sohaib Majzoub
Reducing random-dopant fluctuation impact using footer transistors in many-core systems. Integr. 48 (2015)
Sohaib Majzoub, Zaid Al-Ars, Said Hamdioui
Reducing random-dopant fluctuation impact on core-speed and power variability in many-core platforms. IDT (2013)
Sohaib Majzoub, Hassan B. Diab
MorphoSys reconfigurable hardware for cryptography: the twofish case. J. Supercomput. 59 (1) (2012)
Sohaib Majzoub
Instruction-Based Voltage Scaling for Power Reduction in SIMD MPSoCs. J. Low Power Electron. 7 (2) (2011)
Tatsuya Koyagi, Sohaib Majzoub, Masahiro Fukui, Resve A. Saleh
RTL delay macro-modeling with Vt and Vdd variability. IDT (2011)
Sohaib Majzoub
Voltage island design in multi-core SIMD processors. IDT (2010)
Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab K. Ward
Energy Optimization for Many-Core Platforms: Communication and PVT Aware Voltage-Island Formation and Voltage Selection Algorithm. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (5) (2010)
Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab Ward
Simultaneous PVT-tolerant voltage-island formation and core placement for thousand-core platforms. SoC (2009)
Sohaib Majzoub, Resve A. Saleh, Rabab K. Ward
PVT variation impact on voltage island formation in MPSoC design. ISQED (2009)
Sohaib Majzoub, Resve A. Saleh, Steven J. E. Wilton, Rabab Kreidieh Ward
Removal-Cost Method: An efficient voltage selection algorithm for multi-core platforms under PVT. SoCC (2009)
Sohaib Majzoub, Hassan B. Diab
Instruction-Set Extension for Cryptographic Applications on Reconfigurable Platform. J. Circuits Syst. Comput. 16 (6) (2007)
Sohaib Majzoub, Hassan B. Diab
Mapping and Performance Analysis of Lookup Table Implementations on Reconfigurable Platform. AICCSA (2007)
Issam W. Damaj, Sohaib Majzoub, Hassan B. Diab
2D and 3D Computer Graphics Algorithms under MORPHOSYS. FPL (2002)