Hardware Optimized FPGA Implementations of High-Speed True Random Bit Generators Based on Switching-Type Chaotic Oscillators.
Talal BonnyRidhwan Al DebsiSohaib MajzoubAhmed S. ElwakilPublished in: Circuits Syst. Signal Process. (2019)
Keyphrases
- high speed
- random number generator
- random number
- random number generators
- pseudo random number generators
- software implementation
- hardware implementation
- real time
- data acquisition
- random numbers
- hardware architectures
- low power
- field programmable gate array
- low cost
- hardware architecture
- parallel hardware
- single chip
- shift register
- hardware and software
- xilinx virtex
- efficient implementation
- fpga implementation
- hardware design
- programmable logic
- communication systems
- initial conditions
- dedicated hardware
- computational power
- fpga device
- fpga technology
- general purpose processors
- pseudorandom
- graphics processors
- low power consumption
- high speed networks
- digital signal processing