Login / Signup
Shunsuke Okura
ORCID
Publication Activity (10 Years)
Years Active: 2006-2024
Publications (10 Years): 13
Top Topics
Dynamic Range
Video Camera
Image Sensor
Spatially Varying
Top Venues
Sensors
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
VLSIC
AsianHOST
</>
Publications
</>
Tatsuya Oyama
,
Kota Yoshida
,
Shunsuke Okura
,
Takeshi Fujino
Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
107 (3) (2024)
Tatsuya Oyama
,
Shunsuke Okura
,
Kota Yoshida
,
Takeshi Fujino
Backdoor Attack on Deep Neural Networks Triggered by Fault Injection Attack on Image Sensor Interface.
Sensors
23 (10) (2023)
Ai Otani
,
Hiroaki Ogawa
,
Ken Miyauchi
,
Sangman Han
,
Hideki Owada
,
Isao Takayanagi
,
Shunsuke Okura
An Area-Efficient up/down Double-Sampling Circuit for a LOFIC CMOS Image Sensor.
Sensors
23 (9) (2023)
Tatsuya Oyama
,
Shunsuke Okura
,
Kota Yoshida
,
Takeshi Fujino
Experimental Study of Fault Injection Attack on Image Sensor Interface for Triggering Backdoored DNN Models.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(3) (2022)
Tatsuya Oyama
,
Kota Yoshida
,
Shunsuke Okura
,
Takeshi Fujino
Fundamental Study of Adversarial Examples Created by Fault Injection Attack on Image Sensor Interface.
AsianHOST
(2022)
Shunsuke Okura
,
Masanori Aoki
,
Tatsuya Oyama
,
Masayoshi Shirahata
,
Takeshi Fujino
,
Kenichiro Ishikawa
,
Isao Takayanagi
Area-Efficient Post-Processing Circuits for Physically Unclonable Function with 2-Mpixel CMOS Image Sensor.
Sensors
21 (18) (2021)
Hiroshi Yamada
,
Shunsuke Okura
,
Masayoshi Shirahata
,
Takeshi Fujino
Modeling attacks against device authentication using CMOS image sensor PUF.
IEICE Electron. Express
18 (7) (2021)
Tatsuya Oyama
,
Shunsuke Okura
,
Kota Yoshida
,
Takeshi Fujino
Backdoor Attack on Deep Neural Networks Triggered by Fault Injection Attack on Image Sensor Interface.
ASHES@CCS
(2021)
Kota Yoshida
,
Mitsuru Shiozaki
,
Shunsuke Okura
,
Takaya Kubota
,
Takeshi Fujino
Model Reverse-Engineering Attack against Systolic-Array-Based DNN Accelerator Using Correlation Power Analysis.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(1) (2021)
Kota Yoshida
,
Takaya Kubota
,
Shunsuke Okura
,
Mitsuru Shiozaki
,
Takeshi Fujino
Model Reverse-Engineering Attack using Correlation Power Analysis against Systolic Array Based Neural Network Accelerator.
ISCAS
(2020)
Isao Takayanagi
,
Ken Miyauchi
,
Shunsuke Okura
,
Kazuya Mori
,
Junichi Nakamura
,
Shigetoshi Sugawa
A 120-ke- Full-Well Capacity 160-µV/e- Conversion Gain 2.8-µm Backside-Illuminated Pixel with a Lateral Overflow Integration Capacitor.
Sensors
19 (24) (2019)
Isao Takayanagi
,
Norio Yoshimura
,
Kazuya Mori
,
Shinichiro Matsuo
,
Shunsuke Tanaka
,
Hirofumi Abe
,
Naoto Yasuda
,
Kenichiro Ishikawa
,
Shunsuke Okura
,
Shinji Ohsawa
,
Toshinori Otaka
An Over 90 dB Intra-Scene Single-Exposure Dynamic Range CMOS Image Sensor Using a 3.0 μm Triple-Gain Pixel Fabricated in a Standard BSI Process.
Sensors
18 (1) (2018)
Shunsuke Okura
,
Ryota Ishiki
,
Masayoshi Shirahata
,
Takaya Kubota
,
Mitsuru Shiozaki
,
Kenichiro Ishikawa
,
Isao Takayanagi
,
Takeshi Fujino
A Dynamic Soft-Decision Fuzzy Extractor for a CMOS Image Sensor PUF.
ISPACS
(2018)
Shunsuke Okura
,
Osamu Nishikido
,
Yusuke Sadanaga
,
Yasuhiro Kosaka
,
Norihiko Araki
,
Kazuhiro Ueda
,
Fukashi Morishita
A 3.7 M-Pixel 1300-fps CMOS Image Sensor With 5.0 G-Pixel/s High-Speed Readout Circuit.
IEEE J. Solid State Circuits
50 (4) (2015)
Shunsuke Okura
,
Osamu Nishikido
,
Yusuke Sadanaga
,
Yasuhiro Kosaka
,
Norihiko Araki
,
Kazuhiro Ueda
,
Masanori Tachibana
,
Fukashi Morishita
A 3.7M-pixel 1300-fps CMOS image sensor with 5.0G-pixel/s high-speed readout circuit.
VLSIC
(2014)
Tetsuro Okura
,
Shunsuke Okura
,
Toshimasa Matsuoka
,
Kenji Taniguchi
A low-power technique for pipelined ADCs with programmable gain amplification.
IEICE Electron. Express
10 (1) (2013)
Kazuhiro Ueda
,
Fukashi Morishita
,
Shunsuke Okura
,
Leona Okamura
,
Tsutomu Yoshihara
,
Kazutami Arimoto
Low-Power On-Chip Charge-Recycling DC-DC Conversion Circuit and System.
IEEE J. Solid State Circuits
48 (11) (2013)
Indika U. K. Bogoda Appuhamylage
,
Shunsuke Okura
,
Toru Ido
,
Kenji Taniguchi
An Area-Efficient, Low-Power CMOS Fractional Bandgap Reference.
IEICE Trans. Electron.
(6) (2011)
Indika U. K. Bogoda Appuhamylage
,
Shunsuke Okura
,
Toru Ido
,
Kenji Taniguchi
An Area-Efficient CMOS Bandgap Reference Utilizing a Switched-Current Technique.
IEEE Trans. Circuits Syst. II Express Briefs
(10) (2010)
Shunsuke Okura
,
Hajime Shibata
,
Tetsuro Okura
,
Toru Ido
,
Kenji Taniguchi
A Frequency Model of a Continuously Driven Clocked CMOS Comparator.
IEEE Trans. Circuits Syst. II Express Briefs
(12) (2010)
Shunsuke Okura
,
Tetsuro Okura
,
Toru Ido
,
Kenji Taniguchi
A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2009)
Shunsuke Okura
,
Tetsuro Okura
,
Indika U. K. Bogoda Appuhamylage
,
Kenji Taniguchi
A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2007)
Shunsuke Okura
,
Tetsuro Okura
,
Kenji Taniguchi
,
Hajime Shibata
Frequency Response Analysis of Latch Utilized in High-Speed Comparator.
ICECS
(2006)