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Tetsuro Okura
Publication Activity (10 Years)
Years Active: 2006-2013
Publications (10 Years): 0
Top Topics
High Power
Logic Circuits
Delay Insensitive
Cmos Image Sensor
Top Venues
IEICE Electron. Express
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Publications
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Tetsuro Okura
,
Shunsuke Okura
,
Toshimasa Matsuoka
,
Kenji Taniguchi
A low-power technique for pipelined ADCs with programmable gain amplification.
IEICE Electron. Express
10 (1) (2013)
Shunsuke Okura
,
Hajime Shibata
,
Tetsuro Okura
,
Toru Ido
,
Kenji Taniguchi
A Frequency Model of a Continuously Driven Clocked CMOS Comparator.
IEEE Trans. Circuits Syst. II Express Briefs
(12) (2010)
Shunsuke Okura
,
Tetsuro Okura
,
Toru Ido
,
Kenji Taniguchi
A Reference Voltage Buffer with Settling Boost Technique for a 12 bit 18 MHz Multibit/Stage Pipelined A/D Converter.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2009)
Shunsuke Okura
,
Tetsuro Okura
,
Indika U. K. Bogoda Appuhamylage
,
Kenji Taniguchi
A 10-bit 800-Column Low-Power RAM Bank Including Energy-Efficient D-Flip-Flops for a Column-Parallel ADC.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(2) (2007)
Shunsuke Okura
,
Tetsuro Okura
,
Kenji Taniguchi
,
Hajime Shibata
Frequency Response Analysis of Latch Utilized in High-Speed Comparator.
ICECS
(2006)