Shuji Tsukiyama

Publication Activity (10 Years)

Years Active: 1977-2019
Publications (10 Years): 4

Top Topics

Gaussian Mixture

Probability Density Function

Expectation Maximization

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

Publications

Haruki Kazama, Shuji Tsukiyama
Gaussian Mixture Reduction Methods Using Support Vector Machine. TENCON (2019)
Daiki Azuma, Shuji Tsukiyama
A New Algorithm to Determine Covariance in Statistical Maximum for Gaussian Mixture Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2017)
Daiki Azuma, Shuji Tsukiyama, Masahiro Fukui
Approximating the maximum of Gaussians by a Gaussian mixture model for statistical designs. ECCTD (2017)
Naoya Yokoyama, Daiki Azuma, Shuji Tsukiyama, Masahiro Fukui
A New Algorithm for Reducing Components of a Gaussian Mixture Model. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2016)
Daisuke Sasaki, Shuji Tsukiyama, Mariko Matsunaga, Junichi Miyamoto, Shingo Takahashi
A statistical method for analyzing lifetime of a series-connected battery cells. ISCIT (2015)
Lei Lin, Masahiro Fukui, Shuji Tsukiyama
An implementation and evaluation of Backward Euler algorithm to GPGPU power grid circuit simulation. NEWCAS (2013)
Takashi Kambe, Kohsei Takehara, Shuji Tsukiyama
Application-specific arithmetic circuit design for a particle tracking application. LASCAS (2013)
Shuji Tsukiyama, Masahiro Fukui, Takashi Kambe
A new delay distribution model to take long-term degradation into account. LASCAS (2013)
Shuji Tsukiyama, Masahiro Fukui
A New Delay Distribution Model with a Half Triangular Distribution for Statistical Static Timing Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2013)
Shohei Asakawa, Shuji Tsukiyama, Isao Shirakawa, Shuji Nishi, Tadashi Takeda, Tomoyuki Nagai, Yasushi Kubota
An automatic layout method for timing pulse generator of small LCD driver. ECCTD (2011)
Shuji Tsukiyama, Masahiro Fukui
A new statistical maximum operation for Gaussian mixture models and its evaluations. ECCTD (2011)
Shuji Tsukiyama, Masahiro Fukui
An algorithm to improve accuracy of criticality in statistical static timing analysis. DATE (2011)
Masahiro Fukui, Yoriaki Nagata, Shuji Tsukiyama
A power grid optimization algorithm considering timing degradation by NBTI. ISOCC (2011)
Shuji Tsukiyama, Masahiro Fukui
A Statistical Maximum Algorithm for Gaussian Mixture Models Considering the Cumulative Distribution Function Curve. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2011)
Masahiro Fukui, Haruo Miki, Masaya Yoshikawa, Shuji Tsukiyama
A power grid optimization algorithm considering via reliability. ECCTD (2011)
Shingo Takahashi, Shuji Tsukiyama
A New Statistical Timing Analysis Using Gaussian Mixture Models for Delay and Slew Propagated Together. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (3) (2009)
Takayuki Hayashi, Masahiro Fukui, Shuji Tsukiyama
A new power grid optimization algorithm based on manufacturing cost restriction. ECCTD (2009)
Shuji Tsukiyama, Masahiro Fukui
Accuracy of the criticality probabilty of a path in statistical timing analysis. ECCTD (2009)
Shingo Takahashi, Yuki Yoshida, Shuji Tsukiyama
A Gaussian mixture model for statistical timing analysis. DAC (2009)
Shingo Takahashi, Shuji Tsukiyama
A new statistical timing analyzer propagating delay and slew distributions simultaneously. APCCAS (2008)
Yoshiyuki Kawakami, Makoto Terao, Masahiro Fukui, Shuji Tsukiyama
A Power Grid Optimization Algorithm by Observing Timing Error Risk by IR Drop. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2008)
Masanori Hashimoto, Takahito Ijichi, Shingo Takahashi, Shuji Tsukiyama, Isao Shirakawa
Transistor Sizing of LCD Driver Circuit for Technology Migration. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2007)
Shuji Tsukiyama, Masahiko Tomita
An Algorithm to Calculate Correlation Coefficients between Interconnect Delays for Use in Statistical Timing Analysis. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2006)
Shingo Takahashi, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa
A Sampling Switch Design Procedure for Active Matrix Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Shuji Tsukiyama, Masahiko Tomita
An algorithm for calculating correlation coefficients between Elmore interconnect delays. ISCAS (2006)
Yoshihiro Uchida, Sadahiro Tani, Masanori Hashimoto, Shuji Tsukiyama, Isao Shirakawa
Interconnect capacitance extraction for system LCD circuits. ACM Great Lakes Symposium on VLSI (2005)
Shingo Takahashi, Akira Taji, Shuji Tsukiyama, Masanori Hashimoto, Isao Shirakawa
A design scheme for sampling switch in active matrix LCD. ECCTD (2005)
Shuji Tsukiyama
Toward stochastic design for digital circuits: statistical static timing analysis. ASP-DAC (2004)
Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai
Parasitic Capacitance Modeling for Non-Planar Interconnects in Liquid Crystal Displays. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2003)
Sadahiro Tani, Yoshihiro Uchida, Makoto Furuie, Shuji Tsukiyama, BuYeol Lee, Shuji Nishi, Yasushi Kubota, Isao Shirakawa, Shigeki Imai
Parasitic capacitance modeling for multilevel interconnects. APCCAS (1) (2002)
Makoto Furuie, Takao Onoye, Shuji Tsukiyama, Isao Shirakawa
Two-dimensional array layout for NMOS 4-phase dynamic logic. ICECS (2001)
Shuji Tsukiyama, Masakazu Tanaka, Masahiro Fukui
A statistical static timing analysis considering correlations between delays. ASP-DAC (2001)
Naofumi Tsujii, Katsutoshi Baba, Shuji Tsukiyama
An interconnect topology optimization by a tree transformation. ASP-DAC (2000)
Yu-Liang Wu, Douglas Chang, Malgorzata Marek-Sadowska, Shuji Tsukiyama
Not necessarily more switches more routability [sic.]. ASP-DAC (1997)
Yu-Liang Wu, Shuji Tsukiyama, Malgorzata Marek-Sadowska
Graph based analysis of 2-D FPGA routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (1) (1996)
Masayuki Hayashi, Shuji Tsukiyama
A hybrid hierarchical approach for multi-layer global routing. ED&TC (1995)
Yu-Liang Wu, Shuji Tsukiyama, Malgorzata Marek-Sadowska
On computational complexity of a detailed routing problem in two dimensional FPGAs. Great Lakes Symposium on VLSI (1994)
Takashi Shimamoto, Hidetaka Hane, Isao Shirakawa, Shuji Tsukiyama, Shoji Shinoda, Nobuyasu Yui, Nobuyuki Nishiguchi
A distributed routing system for multilayer SOG. EURO-DAC (1992)
Katsunori Tani, Shuji Tsukiyama, Shoji Shinoda, Isao Shirakawa
On area-efficient drawings of rectangular duals for VLSI floor-plan. Math. Program. 52 (1991)
Shuji Tsukiyama, Ikuo Harada, Masahiro Fukui, Isao Shirakawa
A New Global Router for Gate Array LSIsi. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (4) (1983)
Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa
On the Layering Problem of Multilayer PWB Wiring. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 2 (1) (1983)
Shuji Tsukiyama, Ernest S. Kuh
Double-row planar routing and permutation layout. Networks 12 (3) (1982)
Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa
On the layering problem of multilayer PWB wiring. DAC (1981)
Shuji Tsukiyama, Ernest S. Kuh, Isao Shirakawa
On the layering problem of multilayer PWB wiring. Graph Theory and Algorithms (1980)
Shuji Tsukiyama, Isao Shirakawa, Hiroshi Ozaki, Hiromu Ariyoshi
An Algorithm to Enumerate All Cutsets of a Graph in Linear Time per Cutset. J. ACM 27 (4) (1980)
Shuji Tsukiyama, Mikio Ide, Hiromu Ariyoshi, Isao Shirakawa
A New Algorithm for Generating All the Maximal Independent Sets. SIAM J. Comput. 6 (3) (1977)