Sebastian Turullols

Publication Activity (10 Years)

Years Active: 2008-2016
Publications (10 Years): 1

Top Topics

Shared Memory Multiprocessors

Power Management

Ibm Power Processor

Database Workloads

Top Venues

IEEE J. Solid State Circuits

Publications

Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan YangGong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor. IEEE J. Solid State Circuits 51 (1) (2016)
Venkatram Krishnaswamy, Jeffrey Brooks, Georgios K. Konstadinidis, Curtis McAllister, Ha Pham, Sebastian Turullols, Jinuk Luke Shin, Yifan YangGong, Haowei Zhang
4.3 Fine-grained adaptive power management of the SPARC M7 processor. ISSCC (2015)
Jason Hart, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Venkatram Krishnaswamy, Lance Kwong, Robert P. Masleid, Rakesh Mehta, Umesh Nawathe, Aparna Ramachandran, Harikaran Sathianathan, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm. IEEE J. Solid State Circuits 49 (1) (2014)
Yifan YangGong, Sebastian Turullols, Daniel Woo, Changku Huang, King C. Yen, Venkatram Krishnaswamy, Kalon Holdbrook, Jinuk Luke Shin
Asymmetric Frequency Locked Loop (AFLL) for adaptive clock generation in a 28nm SPARC M6 processor. A-SSCC (2014)
John R. Feehrer, Sumti Jairath, Paul Loewenstein, Ram Sivaramakrishnan, David Smentek, Sebastian Turullols, Ali Vahidsafa
The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets. IEEE Micro 33 (2) (2013)
Jason Hart, Steve Butler, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Lance Kwong, Robert P. Masleid, Umesh Nawathe, Aparna Ramachandran, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
3.6GHz 16-core SPARC SoC processor in 28nm. ISSCC (2013)
Venkatram Krishnaswamy, Dawei Huang, Sebastian Turullols, Jinuk Luke Shin
Bandwidth and power management of glueless 8-socket SPARC T5 system. ISSCC (2013)
Jinuk Luke Shin, Robert T. Golla, Hongping Penny Li, Sudesna Dash, Youngmoon Choi, Alan P. Smith, Harikaran Sathianathan, Mayur Joshi, Heechoul Park, Mohamed Elgebaly, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Mary Jo Doherty, Greg Grohoski, Curtis McAllister
The Next Generation 64b SPARC Core in a T4 SoC Processor. IEEE J. Solid State Circuits 48 (1) (2013)
Jinuk Luke Shin, Heechoul Park, Hongping Penny Li, Alan P. Smith, Youngmoon Choi, Harikaran Sathianathan, Sudesna Dash, Sebastian Turullols, Song Kim, Robert P. Masleid, Georgios K. Konstadinidis, Robert T. Golla, Mary Jo Doherty, Greg Grohoski, Curtis McAllister
The next-generation 64b SPARC core in a T4 SoC processor. ISSCC (2012)
Sebastian Turullols, Ram Sivaramakrishnan
SPARC T5: 16-core CMT processor with glueless 1-hop scaling to 8-sockets. Hot Chips Symposium (2012)
John R. Feehrer, Paul Rotker, Milton Shih, Paul Gingras, Peter Yakutis, Stephen Phillips, John Heath, Sebastian Turullols
Coherency Hub Design for Multi-Node Victoria Falls Server Systems. Hot Interconnects (2008)