Yuefei Ge

Publication Activity (10 Years)

Years Active: 2001-2014
Publications (10 Years): 0

Top Topics

Parallel Processing

Clock Frequency

Top Venues

IEEE J. Solid State Circuits

Publications

Jason Hart, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Venkatram Krishnaswamy, Lance Kwong, Robert P. Masleid, Rakesh Mehta, Umesh Nawathe, Aparna Ramachandran, Harikaran Sathianathan, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
A 3.6 GHz 16-Core SPARC SoC Processor in 28 nm. IEEE J. Solid State Circuits 49 (1) (2014)
Jason Hart, Steve Butler, Hoyeol Cho, Yuefei Ge, Gregory Gruber, Dawei Huang, Changku Hwang, Daisy Jian, Timothy Johnson, Georgios K. Konstadinidis, Lance Kwong, Robert P. Masleid, Umesh Nawathe, Aparna Ramachandran, Yongning Sheng, Jinuk Luke Shin, Sebastian Turullols, Zuxu Qin, King C. Yen
3.6GHz 16-core SPARC SoC processor in 28nm. ISSCC (2013)
Georgios K. Konstadinidis, Marc Tremblay, Shailender Chaudhry, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar
Architecture and Physical Implementation of a Third Generation 65 nm, 16 Core, 32 Thread Chip-Multithreading SPARC Processor. IEEE J. Solid State Circuits 44 (1) (2009)
Georgios K. Konstadinidis, Mamun Rashid, Peter F. Lai, Yukio Otaguro, Yannis Orginos, Sudhendra Parampalli, Mark Steigerwald, Shriram Gundala, Rambabu Pyapali, Leonard Rarick, Ilyas Elkin, Yuefei Ge, Ishwar Parulkar
Implementation of a Third-Generation 16-Core 32-Thread Chip-Multithreading SPARCs® Processor. ISSCC (2008)
Andre Kowalczyk, Victor Adler, Chaim Amir, Frank Chiu, Choon Ping Chng, Willem J. de Lange, Yuefei Ge, Subhendra Ghosh, Tan Canh Hoang, Baoqing Huang, Shree Kant, Y. S. Kao, Cong Khieu, Suresh Kumar, Lan Lee, Avi Liebermensch, Xin Liu, Naveen G. Malur, Albert A. Martin, Hiep Ngo, Sung-Hun Oh, Ioannis Orginos, Lorraine Shih, Balmiki Sur, Marc Tremblay, Allan Tzeng, Dan Vo, Sanjay Zambare, Jin Zong
The first MAJC microprocessor: a dual CPU system-on-a-chip. IEEE J. Solid State Circuits 36 (11) (2001)