Paul Loewenstein

Publication Activity (10 Years)

Years Active: 1982-2019
Publications (10 Years): 2

Top Topics

Shared Memory Multiprocessors

Instruction Set

Embedded Processors

Microsoft Sql Server

Top Venues

Hot Interconnects

IEEE J. Solid State Circuits

Publications

Marjan Radi, Wesley W. Terpstra, Paul Loewenstein, Dejan Vucinic
OmniXtend: Direct to Caches Over Commodity Fabric. Hot Interconnects (2019)
Georgios K. Konstadinidis, Hongping Penny Li, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister, Jeffrey Brooks, Ha Pham, Sebastian Turullols, Yifan YangGong, Robert T. Golla, Alan P. Smith, Ali Vahidsafa
SPARC M7: A 20 nm 32-Core 64 MB L3 Cache Processor. IEEE J. Solid State Circuits 51 (1) (2016)
Kathirgamar Aingaran, Sumti Jairath, Georgios K. Konstadinidis, Serena Leung, Paul Loewenstein, Curtis McAllister, Stephen Phillips, Zoran Radovic, Ram Sivaramakrishnan, David Smentek, Thomas Wicki
M7: Oracle's Next-Generation Sparc Processor. IEEE Micro 35 (2) (2015)
Penny Li, Jinuk Luke Shin, Georgios K. Konstadinidis, Francis Schumacher, Venkatram Krishnaswamy, Hoyeol Cho, Sudesna Dash, Robert P. Masleid, Chaoyang Zheng, Yuanjung David Lin, Paul Loewenstein, Heechoul Park, Vijay Srinivasan, Dawei Huang, Changku Hwang, Wenjay Hsu, Curtis McAllister
4.2 A 20nm 32-Core 64MB L3 cache SPARC M7 processor. ISSCC (2015)
John R. Feehrer, Sumti Jairath, Paul Loewenstein, Ram Sivaramakrishnan, David Smentek, Sebastian Turullols, Ali Vahidsafa
The Oracle Sparc T5 16-Core Processor Scales to Eight Sockets. IEEE Micro 33 (2) (2013)
Paul Loewenstein
Formal Verification of Counterflow Pipeline Architecture. TPHOLs (1995)
Lawrence Yang, David Gao, Jamshid Mostoufi, Raju Joshi, Paul Loewenstein
System Design Methodology of UltraSPARC-I. DAC (1995)
Paul Loewenstein
A Formal Theory of Simulations between Infinite Automata. Formal Methods Syst. Des. 3 (1/2) (1993)
Paul Loewenstein
A Formal Theory of Simulations Between Infinite Automata. TPHOLs (1992)
Paul Loewenstein
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. Formal Methods Syst. Des. 1 (4) (1992)
Paul Loewenstein
Learning to use HOL. TPHOLs (1991)
Paul Loewenstein, David L. Dill
Verification of Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. CAV (DIMACS/AMS volume) (1990)
Paul Loewenstein, David L. Dill
Verification of a Multiprocessor Cache Protocol Using Simulation Relations and Higher-Order Logic. CAV (1990)
Paul Loewenstein, David L. Dill
Formal verification of cache systems using refinement relations. ICCD (1990)
Paul Loewenstein
Formal verification of state-machines using higher-order logic. ICCD (1989)
Paul Loewenstein
Reasoning about State Machines in Higher-Order Logic. Hardware Specification, Verification and Synthesis (1989)
Paul Loewenstein, Andrew Fox
Closing the semantic gap. Microprocess. Microprogramming 24 (1-5) (1988)
S. N. Terepin, Paul Loewenstein
Architecture and instruction set of a programmable LSI digital filter. ICASSP (1983)
Paul Loewenstein
Digital pulse frequency demodulation using state-space filtering. ICASSP (1982)