Sabyasachi Das

Publication Activity (10 Years)

Years Active: 2001-2017
Publications (10 Years): 1

Top Topics

Parameter Estimation

Top Venues

Publications

Yatharth Gupta, Sujay Deb, Vikrant Singh, V. N. Srinivasan, Manish Sharma, Sabyasachi Das
Pseudo-BIST: A Novel Technique for SAR-ADC Testing. VDAT (2017)
Sabyasachi Das, Sunil P. Khatri
A Timing-Driven Approach to Synthesize Fast Barrel Shifters. IEEE Trans. Circuits Syst. II Express Briefs (1) (2008)
Sabyasachi Das, Sunil P. Khatri
A Novel Hybrid Parallel-Prefix Adder Architecture With Efficient Timing-Area Characteristic. IEEE Trans. Very Large Scale Integr. Syst. 16 (3) (2008)
Sabyasachi Das, Sunil P. Khatri
A Timing-Driven Synthesis Technique for Arithmetic Product-of-Sum Expressions. VLSI Design (2008)
Sabyasachi Das, Sunil P. Khatri
An Inversion-Based Synthesis Approach for Area and Power Efficient Arithmetic Sum-of-Products. VLSI Design (2008)
Sabyasachi Das, Sunil P. Khatri
A Merged Synthesis Technique for Fast Arithmetic Blocks Involving Sum-of-Products and Shifters. VLSI Design (2008)
Sabyasachi Das, Sunil P. Khatri
Resource sharing among mutually exclusive sum-of-product blocks for area reduction. ACM Trans. Design Autom. Electr. Syst. 13 (3) (2008)
Sandip Paul, Sabyasachi Das, Chitra Dutta
Consequences of Mutation, Selection, and Physico-Chemical Properties of Encoded Proteins on Synonymous Codon Usage in Adenoviruses. APBC (2006)
Giuseppe Gramegna, Philip G. Mattos, Marco Losi, Sabyasachi Das, Massimo Franciotta, Nino G. Bellantone, Michele Vaiana, Valentina Mandará, Mario Paparo
radio. IEEE J. Solid State Circuits 41 (3) (2006)
Sabyasachi Das, Sandip Paul, Chitra Dutta
Trends in Codon and Amino Acid Usage in Human Pathogen Tropheryma Whipplei, the only Known Actinobacteria with Reduced Genome. APBC (2006)
Giuseppe Gramegna, Massimo Franciotta, Valentina Mandará, Nino G. Bellantone, Michele Vaiana, Mario Paparo, Marco Losi, Sabyasachi Das, Philip G. Mattos
radio and CPU/DSP/RAM/ROM. CICC (2004)
Sabyasachi Das, Sunil P. Khatri
An efficient and regular routing methodology for datapath designsusing net regularity extraction. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (1) (2002)
Sabyasachi Das, Sunil P. Khatri
A regularity-driven fast gridless detailed router for high frequency datapath designs. ISPD (2001)