S. M. Rezaul Hasan

Publication Activity (10 Years)

Years Active: 1995-2023
Publications (10 Years): 18

Top Topics

Rolling Shutter

Post Transcriptional

Expression Profiles

Top Venues

Int. J. Circuit Theory Appl.

IEEE Trans. Very Large Scale Integr. Syst.

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Elamana Marakkadath Dalin, S. M. Rezaul Hasan
A Low Phase-Lag Self-Powered SECE Interface Circuit for Pressure-Type Piezoelectric Energy-Harvesting Compatible With COTS Pressure Sensors. IEEE Trans. Very Large Scale Integr. Syst. 31 (10) (2023)
Marilou Cadatal-Raduban, Jade Pope, Jirí Olejnícek, Michal Kohout, John A. Harrison, S. M. Rezaul Hasan
Ultraviolet-C Photoresponsivity Using Fabricated TiO2 Thin Films and Transimpedance-Amplifier-Based Test Setup. Sensors 22 (21) (2022)
Naina Singhal, S. M. Rezaul Hasan
A 25-30-GHz RMS Error-Minimized 360° Continuous Analog Phase Shifter Using Closed-Loop Self-Tuning I/Q Generator. IEEE Trans. Very Large Scale Integr. Syst. 30 (6) (2022)
S. M. Rezaul Hasan
A Process-Based Temperature Compensated On-Chip CMOS VHF VCRO in 130-nm Si-Ge BiCMOS by Implementing an Empirical Control Equation. IEEE Access 10 (2022)
Yumeng Zhang, S. M. Rezaul Hasan
-Boosted Miller-Effect Minimized Inverter-Cascode Transimpedance Amplifier for Sensor Applications. IEEE Access 9 (2021)
Yumeng Zhang, S. M. Rezaul Hasan
On the gm-boosted common source with source degeneration and its configuration as a transimpedance amplifier. Int. J. Circuit Theory Appl. 49 (5) (2021)
Naina Singhal, S. M. Rezaul Hasan
Review and comparison of different limited scan phased array antenna architectures. Int. J. Circuit Theory Appl. 49 (10) (2021)
Nabihah Ahmad, S. M. Rezaul Hasan
A new ASIC implementation of an advanced encryption standard (AES) crypto-hardware accelerator. Microelectron. J. 117 (2021)
Meera Kumari, S. M. Rezaul Hasan
A Low Duty Cycle Burst-Mode Telemeter Signal Generation Technique for VHF Insect Tracking and Its CMOS Implementation. IEEE Trans. Very Large Scale Integr. Syst. 28 (3) (2020)
S. M. Rezaul Hasan
The "nonideal" drain-loaded source-follower and accurate differential-amplifier analysis. Int. J. Circuit Theory Appl. 48 (7) (2020)
Sadia Alam, S. M. Rezaul Hasan
A Gene-Protein-miRNA Electronic Oscillator. IEEE Trans. Circuits Syst. II Express Briefs (9) (2017)
Ibtisam A. Abbas Al-Darkazly, S. M. Rezaul Hasan
Optimized low-power CMOS active-electrode-pair for low-frequency multi-channel biomedical stimulation. Microelectron. J. 66 (2017)
Vignesh Raja Balu, S. M. Rezaul Hasan
Computationally Minimized X-Part for FX Correlator in Big-Data Interferometers. IEEE Access 5 (2017)
Stepan Lapshev, S. M. Rezaul Hasan
New Low Glitch and Low Power DET Flip-Flops Using Multiple C-Elements. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2016)
Ananiah Durai Sundararajan, S. M. Rezaul Hasan
-Doubling Recycled Folded Cascode for Microsensor Instrumentation Amplifiers. IEEE Trans. Circuits Syst. II Express Briefs (6) (2016)
Ibtisam A. Abbas Al-Darkazly, S. M. Rezaul Hasan
Dual-Band Waveform Generator With Ultra-Wide Low-Frequency Tuning-Range. IEEE Access 4 (2016)
Sadia Alam, S. M. Rezaul Hasan
A VLSI Circuit Emulation of Chemical Synaptic Transmission Dynamics and Postsynaptic DNA Transcription. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Ibtisam A. Abbas Al-Darkazly, S. M. Rezaul Hasan
A waveform generator circuit for extra low-frequency CMOS micro-power applications. Int. J. Circuit Theory Appl. 44 (2) (2016)
Jack Li, S. M. Rezaul Hasan
Design and Performance Analysis of a 866-MHz Low-Power Optimized CMOS LNA for UHF RFID. IEEE Trans. Ind. Electron. 60 (5) (2013)
Sadia Alam, S. M. Rezaul Hasan
Integrated Circuit Modeling of Biocellular Post-Transcription Gene Mechanisms Regulated by MicroRNA and Proteasome. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2013)
S. M. Rezaul Hasan
A 0.8V 40 Gb/s Novel CMOS Regulated Cascode Trans-impedance Amplifier for Optical Sensing Applications. J. Signal Process. Syst. 72 (1) (2013)
Nabihah Ahmad, S. M. Rezaul Hasan
Low-power compact composite field AES S-Box/Inv S-Box design in 65 nm CMOS using Novel XOR Gate. Integr. 46 (4) (2013)
Muhammad Khurram, S. M. Rezaul Hasan
-Boosted CG LNA for Ultrawideband in 130 nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 20 (3) (2012)
Muhammad Khurram, S. M. Rezaul Hasan
-boosted common-gate UWB LNA. Microelectron. J. 42 (2) (2011)
S. M. Rezaul Hasan, Aanan Khurma
AC Dielectrophoresis Using Elliptic Electrode Geometry. J. Sensors 2011 (2011)
S. M. Rezaul Hasan
Analysis and Design of a Multistage CMOS Band-Pass Low-Noise Preamplifier for Ultrawideband RF Receiver. IEEE Trans. Very Large Scale Integr. Syst. 18 (4) (2010)
S. M. Rezaul Hasan
A Low-voltage Scalable (1.8 V-0.75 V) CMOS Folded-cascode LC quadrature VCO for RF Receivers. J. Circuits Syst. Comput. 19 (4) (2010)
S. M. Rezaul Hasan
A micro-sequenced CMOS model for cell signalling pathway using G-protein and phosphorylation cascade. Int. J. Comput. Appl. Technol. 39 (1/2/3) (2010)
Robert P. Fisk, S. M. Rezaul Hasan
Incremental delta-sigma modulators for temperature sensing applications. Int. J. Comput. Appl. Technol. 39 (1/2/3) (2010)
S. M. Rezaul Hasan, W. L. Xu
A central pattern generator circuit for rhythmic robotic chewing locomotion in low-voltage analog CMOS technology. Artif. Life Robotics 14 (3) (2009)
S. M. Rezaul Hasan
A Novel Low-voltage CMOS Variable Gain amplifier with Gain-Independent Input Impedance Matching for DTV Tuning Applications. J. Circuits Syst. Comput. 18 (6) (2009)
S. M. Rezaul Hasan, Nazmul Ula
Analog CMOS charge model for molecular redox electron-transfer reactions and bio-chemical pathways. ISCAS (2008)
S. M. Rezaul Hasan
A Novel Mixed-Signal Integrated Circuit Model for DNA-Protein Regulatory Genetic Circuits and Genetic State Machines. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2008)
S. M. Rezaul Hasan
A PMOS-diode Differential Body-driven Offset compensated 0.5V. VLSI Design (2007)
S. M. Rezaul Hasan, Jie Li
A Bias-Controlled Noise-Canceling CMOS Tuned Low Noise Amplifier for UWB Transceivers. ICECS (2007)
S. M. Rezaul Hasan
A Novel 16-bit CMOS Digitally Controlled Oscillator. APCCAS (2006)
S. M. Rezaul Hasan, Nazmul Ula
A Novel Current Feed-back Sub-Nano-Siemen Transconductance Circuit Suitable for Large Time-Constant Bio-medical Applications. APCCAS (2006)
S. M. Rezaul Hasan
Stability and Compensation Technique for a CMOS Amperometric Potentiostat Circuit for Redox Sensors. APCCAS (2006)
S. M. Rezaul Hasan
Design of a low-power 3.5-GHz broad-band CMOS transimpedance amplifier for optical transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2005)
S. M. Rezaul Hasan
A High Efficiency 3GHz 24-dBm CMOS Linear Power Amplifier for RF Application. IWSOC (2005)
S. M. Rezaul Hasan, Nazmul Ula
A 4GHz Low-Power Folded-Cascode CMOS LC Quadrature VCO for RF Transceivers. ESA/VLSI (2004)
S. M. Rezaul Hasan
A 5GHz CMOS digitally controlled oscillator with a 3GHz tuning range for PLL applications. ICECS (2003)
S. M. Rezaul Hasan
A 5GHz CMOS voltage-current feedback wide-band transimpedance amplifier for optical transceivers. ICECS (2003)
S. M. Rezaul Hasan
A High Performance Wide-band CMOS Transimpedance Amplifier for Optical Transceivers. IWSOC (2003)
Shahin Jafarabadi-Ashtiani, Omid Shoaei, S. M. Rezaul Hasan, Azam Jannesari
On the parasitic-sensitivity of switched-capacitor summing-integrator structures for ΣΔ modulators. IEEE Trans. Circuits Syst. II Express Briefs 50 (9) (2003)
S. M. Rezaul Hasan, Yufridin Wahab
Reduction of Power Dissipation in Dynamic BiCMOS Logic Gates by Transistor Reordering. VLSI Design 2002 (2) (2002)
Lim Chu Aun, S. M. Rezaul Hasan
An all Digital BiCMOS Phase Lock Loop for VLSI Processors. Great Lakes Symposium on VLSI (1999)
Azman M. Yusof, Lim Chu Aun, S. M. Rezaul Hasan
600 MHz Digitally Controlled BiCMOS Oscillator (DCO) for VLSI Signal Processing & Communication Applications. Great Lakes Symposium on VLSI (1998)
S. M. Rezaul Hasan, Kang Siong Ng
A parallel processing VLSI BAM engine. IEEE Trans. Neural Networks 8 (2) (1997)
C. M. Hadzer, S. M. Rezaul Hasan, Lau Kwee Sing
Improved singular value decomposition by using neural networks. ICNN (1995)
S. M. Rezaul Hasan, Kang Siong Ng
A VLSI BAM neural network chip for pattern recognition applications. ICNN (1995)