Design and Performance Analysis of a 866-MHz Low-Power Optimized CMOS LNA for UHF RFID.
Jack LiS. M. Rezaul HasanPublished in: IEEE Trans. Ind. Electron. (2013)
Keyphrases
- low power
- cmos technology
- high speed
- power consumption
- single chip
- nm technology
- low cost
- vlsi architecture
- logic circuits
- low power consumption
- mixed signal
- power dissipation
- ultra low power
- digital signal processing
- vlsi circuits
- gate array
- low voltage
- power reduction
- high power
- wireless transmission
- delay insensitive
- design process
- parallel processing
- real time
- embedded systems
- infrared
- design considerations
- high frequency
- cmos image sensor
- analog to digital converter