New Low Glitch and Low Power DET Flip-Flops Using Multiple C-Elements.

Stepan Lapshev S. M. Rezaul Hasan

Published in: IEEE Trans. Circuits Syst. I Regul. Pap. (2016)

Keyphrases

low power
power consumption
high speed
low cost
power dissipation
low power consumption
cmos technology
wireless transmission
digital signal processing
flip flops
vlsi circuits
single chip
logic circuits
vlsi architecture
high power
gate array
power reduction
hardware and software
image processing
real time