Renshen Wang

Publication Activity (10 Years)

Years Active: 2005-2023
Publications (10 Years): 12

Top Topics

Graph Structure

Highly Connected

Information Extraction

Topic Segmentation

Top Venues

Publications

Chen-Yu Lee, Chun-Liang Li, Hao Zhang, Timothy Dozat, Vincent Perot, Guolong Su, Xiang Zhang, Kihyuk Sohn, Nikolai Glushnev, Renshen Wang, Joshua Ainslie, Shangbang Long, Siyang Qin, Yasuhisa Fujii, Nan Hua, Tomas Pfister
FormNetV2: Multimodal Graph Contrastive Learning for Form Document Information Extraction. CoRR (2023)
Renshen Wang, Yasuhisa Fujii, Alessandro Bissacco
Text Reading Order in Uncontrolled Conditions by Sparse Graph Segmentation. ICDAR (6) (2023)
Renshen Wang, Yasuhisa Fujii, Alessandro Bissacco
Text Reading Order in Uncontrolled Conditions by Sparse Graph Segmentation. CoRR (2023)
Chen-Yu Lee, Chun-Liang Li, Hao Zhang, Timothy Dozat, Vincent Perot, Guolong Su, Xiang Zhang, Kihyuk Sohn, Nikolay Glushnev, Renshen Wang, Joshua Ainslie, Shangbang Long, Siyang Qin, Yasuhisa Fujii, Nan Hua, Tomas Pfister
FormNetV2: Multimodal Graph Contrastive Learning for Form Document Information Extraction. ACL (1) (2023)
Renshen Wang, Yasuhisa Fujii, Ashok C. Popat
Post-OCR Paragraph Recognition by Graph Convolutional Networks. WACV (2022)
Chen-Yu Lee, Chun-Liang Li, Timothy Dozat, Vincent Perot, Guolong Su, Nan Hua, Joshua Ainslie, Renshen Wang, Yasuhisa Fujii, Tomas Pfister
FormNet: Structural Encoding beyond Sequential Modeling in Form Document Information Extraction. CoRR (2022)
Chen-Yu Lee, Chun-Liang Li, Timothy Dozat, Vincent Perot, Guolong Su, Nan Hua, Joshua Ainslie, Renshen Wang, Yasuhisa Fujii, Tomas Pfister
FormNet: Structural Encoding beyond Sequential Modeling in Form Document Information Extraction. ACL (1) (2022)
Shuang Liu, Renshen Wang, Michalis Raptis, Yasuhisa Fujii
Unified Line and Paragraph Detection by Graph Convolutional Networks. DAS (2022)
Shuang Liu, Renshen Wang, Michalis Raptis, Yasuhisa Fujii
Unified Line and Paragraph Detection by Graph Convolutional Networks. CoRR (2022)
Chen-Yu Lee, Chun-Liang Li, Chu Wang, Renshen Wang, Yasuhisa Fujii, Siyang Qin, Ashok C. Popat, Tomas Pfister
ROPE: Reading Order Equivariant Positional Encoding for Graph-based Document Information Extraction. CoRR (2021)
Chen-Yu Lee, Chun-Liang Li, Chu Wang, Renshen Wang, Yasuhisa Fujii, Siyang Qin, Ashok C. Popat, Tomas Pfister
ROPE: Reading Order Equivariant Positional Encoding for Graph-based Document Information Extraction. ACL/IJCNLP (2) (2021)
Renshen Wang, Yasuhisa Fujii, Ashok C. Popat
General-Purpose OCR Paragraph Identification by Graph Convolution Networks. CoRR (2021)
Renshen Wang, Nimish Shah
Scalable hierarchical floorplanning for fast physical prototyping of systems-on-chip. ISPD (2012)
Renshen Wang, Yulei Zhang, Nan-Chi Chou, Evangeline F. Y. Young, Chung-Kuan Cheng, Ronald L. Graham
Bus Matrix Synthesis Based on Steiner Graphs for Power Efficient System-on-Chip Communications. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (2) (2011)
Renshen Wang, Evangeline F. Y. Young, Chung-Kuan Cheng
Complexity of 3-D floorplans by analysis of graph cuboidal dual hardness. ACM Trans. Design Autom. Electr. Syst. 15 (4) (2010)
Renshen Wang, Evangeline F. Y. Young, Ronald L. Graham, Chung-Kuan Cheng
Physical synthesis of bus matrix for high bandwidth low power on-chip communications. ISPD (2010)
Renshen Wang, Takumi Okamoto, Chung-Kuan Cheng
Symmetrical buffer placement in clock trees for minimal skew immune to global on-chip variations. ICCD (2009)
Renshen Wang, Chung-Kuan Cheng
Octilinear redistributive routing in bump arrays. ACM Great Lakes Symposium on VLSI (2009)
Renshen Wang, Chung-Kuan Cheng
On the complexity of graph cuboidal dual problems for 3-D floorplanning of integrated circuit design. ACM Great Lakes Symposium on VLSI (2009)
Renshen Wang, Nan-Chi Chou, Bill Salefski, Chung-Kuan Cheng
Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications. DAC (2009)
Wanping Zhang, Yi Zhu, Wenjian Yu, Amirali Shayan Arani, Renshen Wang, Zhi Zhu, Chung-Kuan Cheng
Noise minimization during power-up stage for a multi-domain power network. ASP-DAC (2009)
Ling Zhang, Wenjian Yu, Yulei Zhang, Renshen Wang, Alina Deutsch, George A. Katopis, Daniel M. Dreps, James F. Buckwalter, Ernest S. Kuh, Chung-Kuan Cheng
Low Power Passive Equalizer Design for Computer Memory Links. Hot Interconnects (2008)
Renshen Wang, Evangeline F. Y. Young, Yi Zhu, Fan Chung Graham, Ronald L. Graham, Chung-Kuan Cheng
3-D floorplanning using labeled tree and dual sequences. ISPD (2008)
Renshen Wang, Rui Shi, Chung-Kuan Cheng
Layer minimization of escape routing in area array packaging. ICCAD (2006)
Renshen Wang, Sheqin Dong, Xianlong Hong
An improved P-admissible floorplan representation based on Corner Block List. ASP-DAC (2005)