Low power gated bus synthesis using shortest-path Steiner graph for system-on-chip communications.
Renshen WangNan-Chi ChouBill SalefskiChung-Kuan ChengPublished in: DAC (2009)
Keyphrases
- low power
- shortest path
- power consumption
- steiner tree
- high speed
- weighted graph
- shortest path problem
- minimum spanning tree
- flow graph
- finding the shortest path
- path length
- low cost
- edge weights
- strongly connected components
- betweenness centrality
- graph search
- shortest path algorithm
- routing algorithm
- vlsi circuits
- road network
- hardware and software
- low power consumption
- power reduction
- source node
- gate array
- optimal path
- directed graph
- random walk
- image processing
- facility location
- image sensor
- spanning tree
- directed acyclic graph
- mixed signal
- graph theory
- social networks