Raphael Polig

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 14

Top Venues

FPL

CoRR

ASAP

DATE

Technical University Munich (PHD)

Education History

Technical University Munich

PHD

Publications

Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. CoRR (2024)
Christian Pilato, Subhadeep Banik, Jakub Beránek, Fabien Brocheton, Jerónimo Castrillón, Riccardo Cevasco, Radim Cmar, Serena Curzel, Fabrizio Ferrandi, Karl F. A. Friebel, Antonella Galizia, Matteo Grasso, Paulo Silva, Jan Martinovic, Gianluca Palermo, Michele Paolino, Andrea Parodi, Antonio Parodi, Fabio Pintus, Raphael Polig, David Poulet, Francesco Regazzoni, Burkhard Ringlein, Roberto Rocco, Katerina Slaninová, Tom Slooff, Stephanie Soldavini, Felix Suchert, Mattia Tibaldi, Beat Weiss, Christoph Hagleitner
A System Development Kit for Big Data Applications on FPGA-based Clusters: The EVEREST Approach. DATE (2024)
Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, François Abel
Acceleration-as-a-µService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs. CLOUD (2021)
Dionysios Diamantopoulos, Raphael Polig, Burkhard Ringlein, Mitra Purandare, Beat Weiss, Christoph Hagleitner, Mark A. Lantz, François Abel
Acceleration-as-a-μService: A Cloud-native Monte-Carlo Option Pricing Engine on CPUs, GPUs and Disaggregated FPGAs. CoRR (2021)
Matteo Manica, Raphael Polig, Mitra Purandare, Roland Mathis, Christoph Hagleitner, María Rodríguez Martínez
FPGA Accelerated Analysis of Boolean Gene Regulatory Networks. IEEE ACM Trans. Comput. Biol. Bioinform. 17 (6) (2020)
Raphael Polig, Kubilay Atasu, Laura Chiticariu, Christoph Hagleitner, H. Peter Hofstee, Frederick R. Reiss, Eva Sitaridi, Huaiyu Zhu
Giving Text Analytics a Boost. CoRR (2018)
Raphael Polig, Kubilay Atasu, Heiner Giefers, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee
A hardware compilation framework for text analytics queries. J. Parallel Distributed Comput. 111 (2018)
Rajdeep Mukherjee, Mitra Purandare, Raphael Polig, Daniel Kroening
Formal Techniques for Effective Co-verification of Hardware/Software Co-designs. DAC (2017)
Mitra Purandare, Raphael Polig, Christoph Hagleitner
Accelerated analysis of Boolean gene regulatory networks. FPL (2017)
Raphael Polig, Kubilay Atasu, Christoph Hagleitner, Theresa Xu, Akihiro Nakayama
Annotation-based finite-state transducers on reconfigurable devices. FPL (2016)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT. J. Signal Process. Syst. 85 (3) (2016)
Heiner Giefers, Peter W. J. Staar, Raphael Polig
Energy-efficient stochastic matrix function estimator for graph analytics on FPGA. FPL (2016)
Jagath Weerasinghe, Raphael Polig, François Abel, Christoph Hagleitner
Network-attached FPGAs for data center applications. FPT (2016)
Christoph M. Angerer, Raphael Polig, D. Zegarac, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni
A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware. Sustain. Comput. Informatics Syst. 12 (2016)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Accelerating arithmetic kernels with coherent attached FPGA coprocessors. DATE (2015)
Raphael Polig, Heiner Giefers, Walter Stechele
A soft-core processor array for relational operators. ASAP (2015)
Raphael Polig, Kubilay Atasu, Laura Chiticariu, Christoph Hagleitner, H. Peter Hofstee, Frederick R. Reiss, Huaiyu Zhu, Eva Sitaridi
Giving Text Analytics a Boost. IEEE Micro 34 (4) (2014)
Raphael Polig, Kubilay Atasu, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee
Hardware-accelerated text analytics. Hot Chips Symposium (2014)
Raphael Polig, Kubilay Atasu, Heiner Giefers, Laura Chiticariu
Compiling text analytics queries to FPGAs. FPL (2014)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system. ASAP (2014)
Kubilay Atasu, Raphael Polig, Christoph Hagleitner, Frederick R. Reiss
Hardware-accelerated regular expression matching for high-throughput text analytics. FPL (2013)
Kubilay Atasu, Raphael Polig, Jonathan Rohrer, Christoph Hagleitner
Exploring the design space of programmable regular expression matching accelerators. J. Syst. Archit. 59 (10-D) (2013)
Raphael Polig, Kubilay Atasu, Christoph Hagleitner
Token-based dictionary pattern matching for text analytics. FPL (2013)
Kanak Agarwal, Raphael Polig
A high-speed and large-scale dictionary matching engine for Information Extraction systems. ASAP (2013)

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Publication Activity (10 Years)

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Raphael Polig