Heiner Giefers

ORCID

Publication Activity (10 Years)

Years Active: 2006-2018
Publications (10 Years): 11

Top Venues

ASAP

FPL

SAMOS

SIGARCH Comput. Archit. News

University of Paderborn (PHD)

Education History

University of Paderborn

PHD

Publications

Dionysios Diamantopoulos, Heiner Giefers, Christoph Hagleitner
ecTALK: Energy efficient coherent transprecision accelerators - The bidirectional long short-term memory neural network case. COOL CHIPS (2018)
Heiner Giefers, Dionysios Diamantopoulos
Extending the POWER Architecture with Transprecision Co-Processors. ISCAS (2018)
Raphael Polig, Kubilay Atasu, Heiner Giefers, Christoph Hagleitner, Laura Chiticariu, Frederick Reiss, Huaiyu Zhu, H. Peter Hofstee
A hardware compilation framework for text analytics queries. J. Parallel Distributed Comput. 111 (2018)
Heiner Giefers, Peter W. J. Staar, Costas Bekas, Christoph Hagleitner
Analyzing the energy-efficiency of sparse matrix multiplication on heterogeneous systems: A comparative study of GPU, Xeon Phi and FPGA. ISPASS (2016)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Measuring and Modeling the Power Consumption of Energy-Efficient FPGA Coprocessors for GEMM and FFT. J. Signal Process. Syst. 85 (3) (2016)
Peter W. J. Staar, Panagiotis Kl. Barkoutsos, Roxana Istrate, A. Cristiano I. Malossi, Ivano Tavernelli, Nikolaj Moll, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni
Stochastic Matrix-Function Estimators: Scalable Big-Data Kernels with High Performance. IPDPS (2016)
Giorgis Georgakoudis, Charles Gillan, Ahmad Hassan, Umar Ibrahim Minhas, Ivor T. A. Spence, George Tzenakis, Hans Vandierendonck, Roger F. Woods, Dimitrios S. Nikolopoulos, Murali Shyamsundar, Paul Barber, Matthew Russell, Angelos Bilas, Stelios Kaloutsakis, Heiner Giefers, Peter W. J. Staar, Costas Bekas, Neil Horlock, Richard Faloon, Colin Pattison
NanoStreams: Codesigned microservers for edge analytics in real time. SAMOS (2016)
Heiner Giefers, Peter W. J. Staar, Raphael Polig
Energy-efficient stochastic matrix function estimator for graph analytics on FPGA. FPL (2016)
Christoph M. Angerer, Raphael Polig, D. Zegarac, Heiner Giefers, Christoph Hagleitner, Costas Bekas, Alessandro Curioni
A fast, hybrid, power-efficient high-precision solver for large linear systems based on low-precision hardware. Sustain. Comput. Informatics Syst. 12 (2016)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Accelerating arithmetic kernels with coherent attached FPGA coprocessors. DATE (2015)
Raphael Polig, Heiner Giefers, Walter Stechele
A soft-core processor array for relational operators. ASAP (2015)
Heiner Giefers, Marco Platzner
An FPGA-Based Reconfigurable Mesh Many-Core. IEEE Trans. Computers 63 (12) (2014)
Raphael Polig, Kubilay Atasu, Heiner Giefers, Laura Chiticariu
Compiling text analytics queries to FPGAs. FPL (2014)
Heiner Giefers, Raphael Polig, Christoph Hagleitner
Analyzing the energy-efficiency of dense linear algebra kernels by power-profiling a hybrid CPU/FPGA system. ASAP (2014)
Heiner Giefers, Christian Plessl, Jens Förstner
Accelerating finite difference time domain simulations with reconfigurable dataflow computers. SIGARCH Comput. Archit. News 41 (5) (2013)
Heiner Giefers, Marco Platzner
A Self-Reconfigurable Lightweight Interconnect for Scalable Processor Fabrics. ERSA (2010)
Heiner Giefers, Marco Platzner
A Triple Hybrid Interconnect for Many-Cores: Reconfigurable Mesh, NoC and Barrier. FPL (2010)
Heiner Giefers, Marco Platzner
Program-driven fine-grained power management for the reconfigurable mesh. FPL (2009)
Heiner Giefers, Marco Platzner
ARMLang: A language and compiler for programming reconfigurable mesh many-cores. IPDPS (2009)
Heiner Giefers
Reconfigurable many-cores with lean interconnect. FPL (2008)
Heiner Giefers, Marco Platzner
Realizing reconfigurable mesh algorithms on softcore arrays. ICSAMOS (2008)
Heiner Giefers, Marco Platzner
A Many-core Implementation based on the Reconfigurable Mesh Model. FPL (2007)
Heiner Giefers, Achim Rettberg
Energy aware multiple clock domain scheduling for a bit-serial, self-timed architecture. SBCCI (2006)

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Publication Activity (10 Years)

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Heiner Giefers