Accelerating arithmetic kernels with coherent attached FPGA coprocessors.
Heiner GiefersRaphael PoligChristoph HagleitnerPublished in: DATE (2015)
Keyphrases
- pipelined architecture
- hardware implementation
- field programmable gate array
- kernel function
- low cost
- high speed
- smart card
- real time image processing
- verilog hdl
- real time
- kernel methods
- floating point
- gaussian kernel
- hardware architectures
- signal processing
- graph kernels
- positive definite
- arithmetic operations
- gaussian kernels
- support vector
- neural network
- hardware design
- single chip
- fpga implementation
- feature selection