Qiyuan Liu

Publication Activity (10 Years)

Years Active: 2016-2020
Publications (10 Years): 10

Top Topics

Quantization Noise

Cmos Image Sensor

Power Consumption

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Dadian Zhou, Junning Jiang, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez
A 245-mA Digitally Assisted Dual-Loop Low-Dropout Regulator. IEEE J. Solid State Circuits 55 (8) (2020)
Dadian Zhou, Carlos Briseno-Vidrios, Junning Jiang, Chulhyun Park, Qiyuan Liu, Eric G. Soenen, Martin Kinyua, José Silva-Martínez
A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2019)
Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, Eric G. Soenen, Martin Kinyua, José Silva-Martínez
A 44-fJ/Conversion Step 200-MS/s Pipeline ADC Employing Current-Mode MDACs. IEEE J. Solid State Circuits 53 (11) (2018)
Qiyuan Liu, Alexander Edward, Dadian Zhou, José Silva-Martínez
A Continuous-Time MASH 1-1-1 Delta-Sigma Modulator With FIR DAC and Encoder-Embedded Loop-Unrolling Quantizer in 40-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 26 (4) (2018)
Eric Cope, Julian Aschieri, Tony Lai, Franklin Zhao, Walter Grandfield, Michael Clifford, Pete Rathfelder, Qiyuan Liu, Siddartha Kavilipati, Aaron Vandergriff, Gerald Miaille
A 2×20W 0.0013% THD+N Class-D audio amplifier with consistent performance up to maximum power level. ISSCC (2018)
Carlos Briseno-Vidrios, Dadian Zhou, Suraj Prakash, Qiyuan Liu, Alexander Edward, José Silva-Martínez
A 13bit 200MS/S pipeline ADC with current-mode MDACs. ISCAS (2017)
Qiyuan Liu, Alexander Edward, Martin Kinyua, Eric G. Soenen, José Silva-Martínez
A Low-Power Digitizer for Back-Illuminated 3-D-Stacked CMOS Image Sensor Readout With Passing Window and Double Auto-Zeroing Techniques. IEEE J. Solid State Circuits 52 (6) (2017)
Qiyuan Liu, Alexander Edward, Carlos Briseno-Vidrios, Negar Rashidi, José Silva-Martínez
High-performance continuous-time MASH sigma-delta ADCs for broadband wireless applications. MWSCAS (2017)
Alexander Edward, Qiyuan Liu, Carlos Briseno-Vidrios, Martin Kinyua, Eric G. Soenen, Aydin Ilker Karsilayan, José Silva-Martínez
A 43-mW MASH 2-2 CT ΣΔ Modulator Attaining 74.4/75.8/76.8 dB of SNDR/SNR/DR and 50 MHz of BW in 40-nm CMOS. IEEE J. Solid State Circuits 52 (2) (2017)
Haoyu Qian, Qiyuan Liu, José Silva-Martínez, Sebastian Hoyos
A 35 dBm Output Power and 38 dB Linear Gain PA With 44.9% Peak PAE at 1.9 GHz in 40 nm CMOS. IEEE J. Solid State Circuits 51 (3) (2016)