A 13-Bit 260MS/s Power-Efficient Pipeline ADC Using a Current-Reuse Technique and Interstage Gain and Nonlinearity Errors Calibration.
Dadian ZhouCarlos Briseno-VidriosJunning JiangChulhyun ParkQiyuan LiuEric G. SoenenMartin KinyuaJosé Silva-MartínezPublished in: IEEE Trans. Circuits Syst. I Regul. Pap. (2019)