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Pil-Ho Lee
ORCID
Publication Activity (10 Years)
Years Active: 2014-2020
Publications (10 Years): 10
Top Topics
Vlsi Implementation
Physical Design
Frame Buffer
Duty Cycle
Top Venues
IEICE Trans. Electron.
IEEE Trans. Consumer Electron.
ISOCC
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
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Publications
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Pil-Ho Lee
,
Young-Chan Jang
A 6.84 Gbps/lane MIPI C-PHY Transceiver Bridge Chip With Level-Dependent Equalization.
IEEE Trans. Circuits Syst.
(11) (2020)
Pil-Ho Lee
,
Young-Chan Jang
A 20-Gb/s Receiver Bridge Chip With Auto-Skew Calibration for MIPI D-PHY Interface.
IEEE Trans. Consumer Electron.
65 (4) (2019)
Pil-Ho Lee
,
Young-Chan Jang
A 3Gbps/Lane MIPI D-PHY Transmission Buffer Chip.
IEICE Trans. Fundam. Electron. Commun. Comput. Sci.
(6) (2019)
Ho-Seong Kim
,
Pil-Ho Lee
,
Jin-Wook Han
,
Seung-Hun Shin
,
Seung-Wuk Baek
,
Doo-Ill Park
,
Yongkyu Seo
,
Young-Chan Jang
A 10 Gbps D-PHY Transmitter Bridge Chip for FPGA-Based Frame Generator Supporting MIPI DSI of Mobile Display.
IEICE Trans. Electron.
(11) (2017)
Pil-Ho Lee
,
Han-Yeol Lee
,
Yeong-Woong Kim
,
Han-Young Hong
,
Young-Chan Jang
A 10-Gbps receiver bridge chip with deserializer for FPGA-based frame grabber supporting MIPI CSI-2.
IEEE Trans. Consumer Electron.
63 (3) (2017)
Seung-Hun Shin
,
Pil-Ho Lee
,
Jin-Woo Park
,
Yu-Jeong Hwang
,
Young-Chan Jang
0.5 kHz-32 MHz digital fractional-N frequency synthesizer with burst-frequency switch.
ISCAS
(2017)
Jin-Wook Han
,
Pil-Ho Lee
,
Yeong-Woong Kim
,
Sang-Dong Kim
,
Jin-Woo Park
,
Young-Chan Jang
A clock recovery for 2.56 GSymbol/s MIPI C-PHY receiver.
ISOCC
(2017)
Pil-Ho Lee
,
Han-Yeol Lee
,
Hyun Bae Lee
,
Young-Chan Jang
An On-Chip Monitoring Circuit for Signal-Integrity Analysis of 8-Gb/s Chip-to-Chip Interfaces With Source-Synchronous Clock.
IEEE Trans. Very Large Scale Integr. Syst.
25 (4) (2017)
Sang-Min Park
,
Yeon-Ho Jeong
,
Yu-Jeong Hwang
,
Pil-Ho Lee
,
Yeong-Woong Kim
,
Jisu Son
,
Han-Yeol Lee
,
Young-Chan Jang
A 10-bit 20-MS/s Asynchronous SAR ADC with Meta-Stability Detector Using Replica Comparators.
IEICE Trans. Electron.
(6) (2016)
Pil-Ho Lee
,
Yu-Jeong Hwang
,
Han-Yeol Lee
,
Hyun Bae Lee
,
Young-Chan Jang
An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis.
IEICE Trans. Electron.
(4) (2016)
Pil-Ho Lee
,
Hyun Bae Lee
,
Young-Chan Jang
A 125MHz 64-Phase Delay-Locked Loop with Coarse-Locking Circuit Independent of Duty Cycle.
IEICE Trans. Electron.
(5) (2014)