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Hyun Bae Lee
ORCID
Publication Activity (10 Years)
Years Active: 2006-2022
Publications (10 Years): 3
Top Topics
Sequential Monte Carlo
Circuit Design
Duty Cycle
Cmos Technology
Top Venues
IEICE Trans. Electron.
IEEE Trans. Circuits Syst. II Express Briefs
IEEE Trans. Very Large Scale Integr. Syst.
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Publications
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Daeho Yun
,
Eonhui Lee
,
Woosong Jung
,
Kahyun Kim
,
Kyung-Min Beak
,
Jihee Kim
,
Hyun Bae Lee
,
Byeongseon Ko
,
Woo-Seok Choi
,
Deog-Kyoon Jeong
A 32-Gb/s PAM4-Binary Bridge With Sampler Offset Cancellation for Memory Testing.
IEEE Trans. Circuits Syst. II Express Briefs
69 (9) (2022)
Pil-Ho Lee
,
Han-Yeol Lee
,
Hyun Bae Lee
,
Young-Chan Jang
An On-Chip Monitoring Circuit for Signal-Integrity Analysis of 8-Gb/s Chip-to-Chip Interfaces With Source-Synchronous Clock.
IEEE Trans. Very Large Scale Integr. Syst.
25 (4) (2017)
Pil-Ho Lee
,
Yu-Jeong Hwang
,
Han-Yeol Lee
,
Hyun Bae Lee
,
Young-Chan Jang
An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis.
IEICE Trans. Electron.
(4) (2016)
Pil-Ho Lee
,
Hyun Bae Lee
,
Young-Chan Jang
A 125MHz 64-Phase Delay-Locked Loop with Coarse-Locking Circuit Independent of Duty Cycle.
IEICE Trans. Electron.
(5) (2014)
Hyun Bae Lee
,
Young-Chan Jang
Mirrored Serpentine Microstrip Lines for Reduction of Far-End Crosstalk.
IEICE Trans. Electron.
(6) (2012)
Hyun Bae Lee
,
Kyoungho Lee
,
Hae Kang Jung
,
Hong June Park
Matrices for 8-Coupled Uniform Lossy Transmission Lines Using 2-Port VNA Measurements.
IEICE Trans. Electron.
(3) (2006)