Login / Signup

An On-Chip Monitoring Circuit with 51-Phase PLL-Based Frequency Synthesizer for 8-Gb/s ODR Single-Ended Signaling Integrity Analysis.

Pil-Ho LeeYu-Jeong HwangHan-Yeol LeeHyun Bae LeeYoung-Chan Jang
Published in: IEICE Trans. Electron. (2016)
Keyphrases
  • high speed
  • genetic algorithm
  • monitoring system
  • circuit design
  • neural network
  • data sets
  • statistical analysis
  • infrared