Penelope Faure

Publication Activity (10 Years)

Years Active: 1992-2002
Publications (10 Years): 0

Publications

Michel Renovell, Penelope Faure, Paolo Prinetto, Yervant Zorian
Testing the Unidimensional Interconnect Architecture of Symmetrical SRAM-Based FPGA. DELTA (2002)
Michel Renovell, Penelope Faure, Jean-Michel Portal, Joan Figueras, Yervant Zorian
IS-FPGA : a new symmetric FPGA architecture with implicit scan. ITC (2001)
Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian
A Discussion on Test Pattern Generation for FPGA - Implemented Circuits. J. Electron. Test. 17 (3-4) (2001)
Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian
TOF: a tool for test pattern generation optimization of an FPGA application oriented test. Asian Test Symposium (2000)
Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian
Some Experiments in Test Pattern Generation for FPGA-Implemented Combinational Circuits. SBCCI (2000)
Michel Renovell, Jean-Michel Portal, Penelope Faure, Joan Figueras, Yervant Zorian
Analyzing the test generation problem for an application-oriented test of FPGAs. ETW (2000)
Dennis de Champeaux, Doug Lea, Penelope Faure
The Process of Object-Oriented Design. OOPSLA (1992)