Nithin Kumar Y. B.

Publication Activity (10 Years)

Years Active: 2019-2023
Publications (10 Years): 9

Top Topics

Image Denoising

Preprocessing Phase

Top Venues

IET Circuits Devices Syst.

Publications

Rupesh D. Kadhao, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Devesh Dwivedi
A 2.5 GHz, 1-Kb SRAM with Auxiliary Circuit Assisted Sense Amplifier in 65-nm CMOS Process. VLSID (2023)
Peta Guruprakashkumar, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Edoardo Bonizzoni
A 1-V, 5-Bit, 180-µW, Differential Pulse Position Modulation ADC in 65-nm CMOS Process. ISCAS (2021)
Shiv Chandra Kumar, Siddharth R. K., Nithin Kumar Y. B., M. H. Vasantha
A 1-V, 10-bit, 250 MS/s, Current-Steering Segmented DAC for Video Applications. ISVLSI (2021)
Sithara Raveendran, Pranose J. Edavoor, Nithin Kumar Y. B., M. H. Vasantha
Reversible Logic Implementation of Image Denoising for Grayscale Images. MWSCAS (2020)
Suraj Dohar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B.
A Novel Single Event Upset Tolerant 12T Memory Cell for Aerospace Applications. ISVLSI (2020)
Vivek Sharma, Nithin Kumar Y. B., Vasantha M. H.
IET Circuits, Devices & Systems. IET Circuits Devices Syst. 14 (6) (2020)
Sanmitra Bharat Naik, Siddharth R. K., Anirban Chatterjee, Nithin Kumar Y. B., M. H. Vasantha, Ramnath Kini
A 1.8 V Quadrature Phase LC Oscillator for 5G Applications. iSES (2020)
Sanmitra Bharat Naik, Siddharth R. K., Anirban Chatterjee, Nithin Kumar Y. B., Vasantha M. H., Ramnath Kini
A Wideband 12 Phase Ring Oscillator for 5G Applications. MWSCAS (2020)
Jagadeesh Pujar, Sithara Raveendran, Trilochan Panigrahi, Vasantha M. H., Nithin Kumar Y. B.
Design and Analysis of Energy Efficient Reversible Logic based Full Adder. MWSCAS (2019)