Vasantha M. H.

Publication Activity (10 Years)

Years Active: 2012-2023
Publications (10 Years): 8

Top Topics

Reed Solomon Codes

Event Sequences

Computing Devices

Top Venues

IET Circuits Devices Syst.

Publications

Rupesh D. Kadhao, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Devesh Dwivedi
A 2.5 GHz, 1-Kb SRAM with Auxiliary Circuit Assisted Sense Amplifier in 65-nm CMOS Process. VLSID (2023)
Darshan Halliyavar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B., Sithara Raveendran
Approximate Three-Operand Binary Adder for Error-Resilient Applications. iSES (2023)
Peta Guruprakashkumar, Siddharth R. K., Nithin Kumar Y. B., Vasantha M. H., Edoardo Bonizzoni
A 1-V, 5-Bit, 180-µW, Differential Pulse Position Modulation ADC in 65-nm CMOS Process. ISCAS (2021)
Tejas J. Shahane, Siddharth R. K., Kumar Y. B. Nithin, Vasantha M. H.
A 1.8 V, Mode-Configurable Hybrid Smart ADC. iSES (2020)
Suraj Dohar, Siddharth R. K., Vasantha M. H., Nithin Kumar Y. B.
A Novel Single Event Upset Tolerant 12T Memory Cell for Aerospace Applications. ISVLSI (2020)
Vivek Sharma, Nithin Kumar Y. B., Vasantha M. H.
IET Circuits, Devices & Systems. IET Circuits Devices Syst. 14 (6) (2020)
Sanmitra Bharat Naik, Siddharth R. K., Anirban Chatterjee, Nithin Kumar Y. B., Vasantha M. H., Ramnath Kini
A Wideband 12 Phase Ring Oscillator for 5G Applications. MWSCAS (2020)
Jagadeesh Pujar, Sithara Raveendran, Trilochan Panigrahi, Vasantha M. H., Nithin Kumar Y. B.
Design and Analysis of Energy Efficient Reversible Logic based Full Adder. MWSCAS (2019)
Vasantha M. H., Tonse Laxminidhi
0.5 V, Low Power, 1 MHz Low Pass Filter in 0.18 µm CMOS Process. ISED (2012)