Nick Kanopoulos

Publication Activity (10 Years)

Years Active: 1983-2004
Publications (10 Years): 0

Publications

Nick Kanopoulos
Design Methodology for Rapid Development of SoC ICs Based on an Innovative System Architecture with Emphasis to Timing Closure and Power Consumption Optimization. PATMOS (2004)
Kostas Adaos, George Alexiou, Nick Kanopoulos
Development of reusable serial FIR filters with reprogrammable coefficients designed for serial dataflow architectures. ICECS (2000)
Theodore Karoubalis, George Alexiou, Nick Kanopoulos
A dual rail circuits synthesis environment for the implementation of multiple output boolean functions. Int. J. Circuit Theory Appl. 26 (4) (1998)
Kostas Adaos, George Alexiou, Nick Kanopoulos
An Extensible, Low Cost Rapid Prototyping Environment Based on a Reconfigurable Set of FPGAs. International Workshop on Rapid System Prototyping (1998)
Tassos Markas, E. Edwards, S. Wang, J. Medero, Nick Kanopoulos
Automatic synthesis of an 8-bit CPU with 100% on-line error detection capability. ICECS (1996)
W. Weber, Michael G. McNamer, Nick Kanopoulos
TESPAD: a testability specifications advisor for a structured test methodology. ICECS (1996)
Theodoros Antonakopoulos, C. Powers, Nick Kanopoulos
A versatile wireless system for real-time telemetry applications. ICECS (1996)
Apostolos Dollas, Nick Kanopoulos
Reducing the Time to Market Through Rapid Prototyping - Guest Editors' Introduction. Computer 28 (2) (1995)
Theodore Karoubalis, George Alexiou, Nick Kanopoulos
Optimal synthesis of differential cascode voltage switch (DCVS) logic circuits using ordered binary decision diagrams (OBDDs). EURO-DAC (1995)
Theodore Karoubalis, Kostas Adaos, George Alexiou, Nick Kanopoulos
A new efficient dcvs circuit synthesis technique used for an improved implementation of a serial/parallel multiplier. Int. J. Circuit Theory Appl. 23 (6) (1995)
Jason P. Hurst, Nick Kanopoulos
Flip-flop sharing in standard scan path to enhance delay fault testing of sequential circuits. Asian Test Symposium (1995)
George Alexiou, Dimitrios Stiliadis, Nick Kanopoulos
On the design of a high-performance, expandable, sorting engine. Integr. 18 (1) (1994)
Tassos Markas, Mark Royals, Nick Kanopoulos
Design and DCVS implementation of a self-checking bus-monitor unit for highly reliable fault-tolerant system configurations. IEEE Trans. Very Large Scale Integr. Syst. 2 (2) (1994)
George Alexiou, Dimitrios Stiliadis, Nick Kanopoulos
Design and Implementation of a High-Performance, Modular, Sorting Engine. EDAC-ETC-EUROASIC (1994)
Theodoros Antonakopoulos, Nick Kanopoulos
Multiple boundary scan-paths for minimizing circuit-board test-application time. Microprocess. Microprogramming 40 (6) (1994)
Nazar S. Haider, Nick Kanopoulos
Efficient board interconnect testing using the split boundary scan register. J. Electron. Test. 4 (2) (1993)
Nick Kanopoulos, Joseph H. Carabetta
Design and implementation of a totally self-checking 16 × 16 bit array multiplier. Integr. 14 (2) (1992)
George Alexiou, Nick Kanopoulos
A new serial/parallel two's complement multiplier for vlsi digital signal processing. Int. J. Circuit Theory Appl. 20 (2) (1992)
Mark Royals, Tassos Markas, Nick Kanopoulos
A user programmable macrocell generator for the IEEE 1149.1 boundary scan standard interface port. Microprocess. Microprogramming 35 (1-5) (1992)
Nazar S. Haider, Nick Kanopoulos
The split boundary scan register technique for testing board interconnects. VTS (1992)
Nick Kanopoulos, Dimitris Pantzartzis, Frederick R. Bartram
Design of Self-Checking Circuits Using DCVS Logic: A Case Study. IEEE Trans. Computers 41 (7) (1992)
Tassos Markas, Mark Royals, Nick Kanopoulos
On Distributed Fault Simulation. Computer 23 (1) (1990)
Mark Royals, Tassos Markas, Tianmaw Yang, Nick Kanopoulos
Creating the IC palette [ASIC design]. RSP (1990)
Tassos Markas, Nick Kanopoulos
A bus-monitor unit for fault-tolerant system configurations. Microprocessing and Microprogramming 30 (1-5) (1990)
J. Dodrill, Nick Kanopoulos
On the design of a real-time digital median filter. Microprocessing and Microprogramming 27 (1-5) (1989)
Jill J. Hallenbeck, James R. Cybrynski, Nick Kanopoulos, Tassos Markas, Nagesh Vasanthavada
The Test Engineer's Assistant: A Support Environment for Hardware Design for Testability. Computer 22 (4) (1989)
Nagesh Vasanthavada, Nick Kanopoulos
A built-in test module for fault isolation. IEEE Des. Test 6 (3) (1989)
Nick Kanopoulos, Peter N. Marinos
Design of a bus-monitor for real-time applications. Microprocess. Microprogramming 24 (1-5) (1988)
Jill J. Hallenbeck, Nick Kanopoulos, Nagesh Vasanthavada, James W. Watterson
CAD Tools for Supporting System Design for Testability. ITC (1988)
Nick Kanopoulos, Nagesh Vasanthavada
A monolithic scan-line bit producer for real-time image rasterization. Microprocess. Microprogramming 21 (1-5) (1987)
Nick Kanopoulos, Peter N. Marinos
A High-Performance Single-Chip VLSI Signal Processor Architecture. Aegean Workshop on Computing (1986)
Nick Kanopoulos, Vassilios Makios
A single-chip adaptive delta modulator with optimum performance. Integr. 3 (4) (1985)
Nick Kanopoulos, G. Thomas Mitchell
Testing of Bit-Serial Signal Processors. ITC (1983)