A new serial/parallel two's complement multiplier for vlsi digital signal processing.
George AlexiouNick KanopoulosPublished in: Int. J. Circuit Theory Appl. (1992)
Keyphrases
- digital signal processing
- signal processing
- power dissipation
- low power
- image processing
- data flow
- hardware implementation
- computer vision and image processing
- high speed
- processor array
- parallel implementation
- parallel processing
- computer vision
- floating point
- pattern recognition
- database
- vlsi design
- medical images
- low cost
- shared memory
- artificial neural networks
- field programmable gate array
- data mining