Naveed A. Sherwani

Publication Activity (10 Years)

Years Active: 1989-2009
Publications (10 Years): 0

Publications

Naveed A. Sherwani
Dreams, Plans, and Journey of Reaching Perfect Predictability and Reliability in ASICs. DFT (2009)
Naveed A. Sherwani, Susan Lippincott Mack, Alex Alexanian, Premal Buch, Carlo Guardiani, Harold Lehon, Peter Rabkin, Atul Sharan
DFM rules! DAC (2005)
Robert Dahlberg, Shishpal Rawat, Jen Bernier, Gina Gloski, Aurangzeb Khan, Kaushik Patel, Paul Ruddy, Naveed A. Sherwani, Ronnie Vasishta
COT - customer owned trouble. DAC (2003)
Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Marcin Jeske, Naveed A. Sherwani
Integrated floorplanning with buffer/channel insertion for bus-based designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 22 (6) (2003)
Faran Rafiq, Malgorzata Chrzanowska-Jeske, Hannah Honghua Yang, Naveed A. Sherwani
Integrated floorplanning with buffer/channel insertion for bus-based microprocessor designs. ISPD (2002)
Naveed A. Sherwani
The bottom-10 problems in EDA (panel session (title only)). ISPD (2000)
Dinesh P. Mehta, Naveed A. Sherwani
On the use of flexible, rectilinear blocks to obtain minimum-area floorplans in mixed block and cell designs. ACM Trans. Design Autom. Electr. Syst. 5 (1) (2000)
T. Karn, Shishpal Rawat, Desmond Kirkpatrick, Rabindra K. Roy, Greg Spirakis, Naveed A. Sherwani, Craig Peterson
EDA challenges facing future microprocessor design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 19 (12) (2000)
Jeff Parkhurst, Naveed A. Sherwani, Sury Maturi, Dana Ahrams, Eli Chiprout
SRC physical design top ten problem. ISPD (1999)
Hung-Ming Chen, Hai Zhou, Fung Yu Young, D. F. Wong, Hannah Honghua Yang, Naveed A. Sherwani
Integrated floorplanning and interconnect planning. ICCAD (1999)
Naveed A. Sherwani, Prashant Sawkar
Embedded Tutorial: Layout Driven Synthesis or Synthesis Driven Layout. VLSI Design (1998)
Dinesh P. Mehta, Naveed A. Sherwani, A. Bariya
T3: Physical Design. VLSI Design (1997)
Dinesh P. Mehta, Naveed A. Sherwani
A Minimum-Area Floorplanning Algorithm for MBC Designs. Great Lakes Symposium on VLSI (1996)
Srinivasa R. Danda, Xiaolin Liu, Sreekrishna Madhwapathy, Anand Panyam, Naveed A. Sherwani, Ioannis G. Tollis
Optimal algorithms for planar over-the-cell routing problems. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 15 (11) (1996)
Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani, Aman Sureka
OPRON: a new approach to planar OTC routing. Great Lakes Symposium on VLSI (1995)
Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani
Optimal algorithms for planar over-the-cell routing in the presence of obstacles. VLSI Design (1995)
Alfred J. Boals, Ajay K. Gupta, Naveed A. Sherwani
Incomplete hypercubes: Algorithms and embeddings. J. Supercomput. 8 (3) (1994)
Pramod Anne, Aditya Reddy, Naveed A. Sherwani, Anand Panyam, Siddharth Bhingarde
Comparative Analysis of New CMOS Leaf Cells for OTC Routing. ISCAS (1994)
Sreekrishna Madhwapathy, Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam
A Unified Approach to Multilayer Over-the-Cell Routing. DAC (1994)
Jim E. Crenshaw, Spyros Tragoudas, Naveed A. Sherwani
High Performance Over-the-Cell Routing. VLSI Design (1994)
Sreekrishna Madhwapathy, Naveed A. Sherwani, Siddharth Bhingarde, Anand Panyam
An Efficient Four Layer Over-the-Cell Router. ISCAS (1994)
Siddharth Bhingarde, Rafay Khawaja, Anand Panyam, Naveed A. Sherwani
Over-the-Cell Routing Algorithms for Industrial Cell Models. VLSI Design (1994)
Anand Panyam, Srinivasa R. Danda, Sreekrishna Madhwapathy, Naveed A. Sherwani
An optimal algorithm for maximum two planar subset problem [VLSI layout]. Great Lakes Symposium on VLSI (1994)
Qiong Yu, Sandeep Badida, Naveed A. Sherwani
Algorithmic Aspects of Three Dimensional MCM Routing. DAC (1994)
Arun Shanbhag, Srinivasa R. Danda, Naveed A. Sherwani
Floorplanning for mixed macro block and standard cell designs. Great Lakes Symposium on VLSI (1994)
Wasim Khan, Sreekrishna Madhwapathy, Naveed A. Sherwani
A Hierarchical Approach to Clock Routing in High Performance Systems. ISCAS (1994)
Dana L. Grinstead, Peter J. Slater, Naveed A. Sherwani, Nancy D. Holmes
Efficient Edge Domination Problems in Graphs. Inf. Process. Lett. 48 (5) (1993)
Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani
Middle terminal cell models for efficient over-the-cell routing in high-performance circuits. IEEE Trans. Very Large Scale Integr. Syst. 1 (4) (1993)
Jason Cong, Moazzem Hossain, Naveed A. Sherwani
-Layer Topological Planar Routing Problems. VLSI Design (1993)
Jason Cong, Moazzem Hossain, Naveed A. Sherwani
A provably good multilayer topological planar routing algorithm in IC layout designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (1) (1993)
Surendra Burman, Naveed A. Sherwani
Programmable multichip modules. IEEE Micro 13 (2) (1993)
Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani
Efficient Over-the-cell Routing Algorithm for General Middle Terminal Model. ISCAS (1993)
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh
Utilization of vacant terminals for improved over-the-cell channel routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 12 (6) (1993)
Siddharth Bhingarde, Anand Panyam, Naveed A. Sherwani
On Optimum Cell Models for Over-the-Cell Routing. VLSI Design (1993)
Sivakumar Natarajan, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh
Over-the-Cell Channel Routing for High Performance Circuits. DAC (1992)
Bo Wu, Naveed A. Sherwani, Nancy D. Holmes, Majid Sarrafzadeh
Over-the-Cell Routers for New Cell Model. DAC (1992)
Arnob Roy, Jitender S. Deogun, Naveed A. Sherwani
A Parallel Algorithm for Single Row Routing Problems. J. Circuits Syst. Comput. 2 (2) (1992)
Surendra Burman, Chandar Kamalanathan, Naveed A. Sherwani
New channel segmentation model and associated routing algorithm for high performance FPGAs. ICCAD (1992)
Wasim Khan, Moazzem Hossain, Naveed A. Sherwani
Zero skew clock routing in multiple-clock synchronous systems. ICCAD (1992)
Alfred J. Boals, Ajay K. Gupta, Jahangir A. Hashmi, Naveed A. Sherwani
Compact Hypercubes: Properties and Recognition. ICCI (1991)
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh
New Algorithm for Over-the-Cell Channel Routing Using Vacant Terminals. DAC (1991)
Venkata K. Prabhala, Naveed A. Sherwani
Fully Normal Algorithms for Incomplete Hypercubes. IPPS (1991)
Alfred J. Boals, Ajay Gupta, Jahangir A. Hashmi, Naveed A. Sherwani
An Efficient Approximation Algorithm for Hypercube Scheduling. ICCI (1991)
Moazzem Hossain, Naveed A. Sherwani
On Topological Via Minimization and Routing. ICCAD (1991)
Ajay Gupta, Alfred J. Boals, Naveed A. Sherwani
On Optimal Embeddings into Incomplete Hypercubes. IPPS (1991)
S. Miriyala, Jahangir A. Hashmi, Naveed A. Sherwani
Switchbox Steiner Tree Problem in Presence of Obstacles. ICCAD (1991)
Nancy D. Holmes, Naveed A. Sherwani, Majid Sarrafzadeh
Algorithms for Three-Layer Over-The-Cell Channel Routing. ICCAD (1991)
Roshan A. Gidwani, Naveed A. Sherwani
MISER: An Integrated Three Layer Gridless Channel Router and Compactor. DAC (1990)
Naveed A. Sherwani, Jitender S. Deogun
A New Heuristic for Single Row Routing Problems. DAC (1989)