Mostafa E. Salehi

Publication Activity (10 Years)

Years Active: 2006-2023
Publications (10 Years): 20

Top Topics

Instruction Set

Embedded Processors

Silicon Dioxide

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

J. Supercomput.

Microprocess. Microsystems

Publications

Iman Dadras, Sakineh Seydi, Mohammad Hasan Ahmadilivani, Jaan Raik, Mostafa E. Salehi
Fully-Fusible Convolutional Neural Networks for End-to-End Fused Architecture with FPGA Implementation. ICECS (2023)
Najmeh Nazari, Mostafa E. Salehi
Inter-Layer Hybrid Quantization Scheme for Hardware Friendly Implementation of Embedded Deep Neural Networks. ACM Great Lakes Symposium on VLSI (2023)
Seyed Ahmad Mirsalari, Najmeh Nazari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
FaCT-LSTM: Fast and Compact Ternary Architecture for LSTM Recurrent Neural Networks. IEEE Des. Test 39 (3) (2022)
Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Mostafa E. Salehi, Soheil Ghiasi
E2BNet: MAC-free yet accurate 2-level binarized neural network accelerator for embedded systems. J. Real Time Image Process. 18 (4) (2021)
Seyed Ahmad Mirsalari, Najmeh Nazari, Seyed Ali Ansarmohammadi, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
ELC-ECG: Efficient LSTM Cell for ECG Classification Based on Quantized Architecture. ISCAS (2021)
Najmeh Nazari, Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
Multi-level Binarized LSTM in EEG Classification for Wearable Devices. PDP (2020)
Najmeh Nazari, Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
Multi-level Binarized LSTM in EEG Classification for Wearable Devices. CoRR (2020)
Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
MuBiNN: Multi-Level Binarized Recurrent Neural Network for EEG signal Classification. CoRR (2020)
Seyed Ahmad Mirsalari, Sima Sinaei, Mostafa E. Salehi, Masoud Daneshtalab
MuBiNN: Multi-Level Binarized Recurrent Neural Network for EEG Signal Classification. ISCAS (2020)
Iraj Moghaddasi, Mostafa E. Salehi, Mehdi Kargahi
Aging-Aware Instruction-Level Statistical Dynamic Timing Analysis for Embedded Processors. IEEE Trans. Very Large Scale Integr. Syst. 28 (2) (2020)
Najmeh Nazari, Mohammad Loni, Mostafa E. Salehi, Masoud Daneshtalab, Mikael Sjödin
TOT-Net: An Endeavor Toward Optimizing Ternary Neural Networks. DSD (2019)
Iraj Moghaddasi, Arash Fouman, Mostafa E. Salehi, Mehdi Kargahi
Instruction-Level NBTI Stress Estimation and Its Application in Runtime Aging Prediction for Embedded Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (8) (2019)
Mostafa E. Salehi, Ali Azarpeyvand, Armin Hajaboutalebi Aboutalebi
Vulnerability Analysis of Adder Architectures Considering Design and Synthesis Constraints. J. Electron. Test. 34 (1) (2018)
Hamed Norouzi, Mostafa E. Salehi
Evolutionary design for energy-efficient approximate digital circuits. Microprocess. Microsystems 57 (2018)
Hamid Nejatollahi, Mostafa E. Salehi
Reliability-Aware Voltage Scaling of Multicore Processors in Dark Silicon Era. TopHPC (2017)
M. Hassan Najafi, Mostafa E. Salehi
A Fast Fault-Tolerant Architecture for Sauvola Local Image Thresholding Algorithm Using Stochastic Computing. IEEE Trans. Very Large Scale Integr. Syst. 24 (2) (2016)
Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie, Saeed Safari
Fast and accurate architectural vulnerability analysis for embedded processors using Instruction Vulnerability Factor. Microprocess. Microsystems 42 (2016)
Hoda Mahdiani, Saeed Safari, Mostafa E. Salehi
Fast and accurate FPGA-based framework for processor architecture vulnerability analysis. Integr. 53 (2016)
Hamed Dorosti, Ali Teymouri, Sied Mehdi Fakhraie, Mostafa E. Salehi
Ultralow-Energy Variation-Aware Design: Adder Architecture Study. IEEE Trans. Very Large Scale Integr. Syst. 24 (3) (2016)
Hamid Nejatollahi, Mostafa E. Salehi
Voltage scaling and dark silicon in symmetric multicore processors. J. Supercomput. 71 (10) (2015)
Amir Yazdanbakhsh, Mostafa E. Salehi, Sied Mehdi Fakhraie
Customized pipeline and instruction set architecture for embedded processing engines. J. Supercomput. 68 (2) (2014)
Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie
An analytical method for reliability aware instruction set extension. J. Supercomput. 67 (1) (2014)
Mostafa E. Salehi, Sied Mehdi Fakhraie, Amir Yazdanbakhsh
Instruction set architectural guidelines for embedded packet-processing engines. J. Syst. Archit. 58 (3-4) (2012)
Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie
Vulnerability Analysis for Custom Instructions. DSD (2012)
Ali Azarpeyvand, Mostafa E. Salehi, Seid Mehdi Fakhraie
CIVA: Custom instruction vulnerability analysis framework. DDECS (2012)
Mehdi Alipour, Mostafa E. Salehi, Hesamodin Shojaei Baghini
Design Space Exploration to Find the Optimum Cache and Register File Size for Embedded Applications CoRR (2012)
Mehdi Alipour, Mostafa E. Salehi
Performance-Optimum Superscalar Architecture for Embedded Applications CoRR (2012)
Farshad Firouzi, Ali Azarpeyvand, Mostafa E. Salehi, Sied Mehdi Fakhraie
Adaptive fault-tolerant DVFS with dynamic online AVF prediction. Microelectron. Reliab. 52 (6) (2012)
Mostafa E. Salehi, Mehrzad Samadi, Mehrdad Najibi, Ali Afzali-Kusha, Massoud Pedram, Sied Mehdi Fakhraie
Dynamic Voltage and Frequency Scheduling for Embedded Processors Considering Power/Performance Tradeoffs. IEEE Trans. Very Large Scale Integr. Syst. 19 (10) (2011)
Abbas Rahimi, Mostafa E. Salehi, Siamak Mohammadi, Sied Mehdi Fakhraie
Low-energy GALS NoC with FIFO - Monitoring dynamic voltage scaling. Microelectron. J. 42 (6) (2011)
Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie
An accurate model for soft error rate estimation considering dynamic voltage and frequency scaling effects. Microelectron. Reliab. 51 (2) (2011)
Amir Yazdanbakhsh, Mehdi Kamal, Mostafa E. Salehi, Hamid Noori, Sied Mehdi Fakhraie
Energy-aware design space exploration of registerfile for extensible processors. ICSAMOS (2010)
Farshad Firouzi, Mostafa E. Salehi, Fan Wang, Sied Mehdi Fakhraie, Saeed Safari
Reliability-Aware Dynamic Voltage and Frequency Scaling. ISVLSI (2010)
Ali Azarpeyvand, Mostafa E. Salehi, Farshad Firouzi, Amir Yazdanbakhsh, Sied Mehdi Fakhraie
Instruction reliability analysis for embedded processors. DDECS (2010)
Mostafa E. Salehi, Hamed Dorosti, Sied Mehdi Fakhraie
Architecture-Level Design Space Exploration of Super Scalar Microarchitecture for Network Applications. DSD (2010)
Mostafa E. Salehi, Sied Mehdi Fakhraie
Quantitative analysis of packet-processing applications regarding architectural guidelines for network-processing-engine development. J. Syst. Archit. 55 (7-9) (2009)
Mostafa E. Salehi, Sied Mehdi Fakhraie, Abbas Banaiyan, Abbas Hormati
Design of a Custom Packet Switching Engine for Network Applications. CSICC (2008)
Mehrdad Najibi, Mostafa E. Salehi, Ali Afzali-Kusha, Massoud Pedram, Seid Mehdi Fakhraie, Hossein Pedram
Dynamic voltage and frequency management based on variable update intervals for frequency setting. ICCAD (2006)