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Michael Ruegg
Publication Activity (10 Years)
Years Active: 2005-2012
Publications (10 Years): 0
Top Topics
Nm Technology
Power Plant
Data Quality
Intelligent Control
Top Venues
VLSIC
AST
IEEE J. Solid State Circuits
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Publications
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Thomas Toifl
,
Christian Menolfi
,
Michael Ruegg
,
Robert Reutemann
,
Daniel Dreps
,
Troy J. Beukema
,
Andrea Prati
,
Daniele Gardellini
,
Marcel A. Kossel
,
Peter Buchmann
,
Matthias Braendli
,
Pier Andrea Francese
,
Thomas Morf
A 2.6 mW/Gbps 12.5 Gbps RX With 8-Tap Switched-Capacitor DFE in 32 nm CMOS.
IEEE J. Solid State Circuits
47 (4) (2012)
Michael Ruegg
,
Peter Sommerlad
Refactoring towards seams in C++.
AST
(2012)
Thomas Toifl
,
Michael Ruegg
,
Rajesh Inti
,
Christian Menolfi
,
Matthias Braendli
,
Marcel A. Kossel
,
Peter Buchmann
,
Pier Andrea Francese
,
Thomas Morf
A 3.1mW/Gbps 30Gbps quarter-rate triple-speculation 15-tap SC-DFE RX data path in 32nm CMOS.
VLSIC
(2012)
Christian Menolfi
,
Thomas Toifl
,
Michael Ruegg
,
Matthias Braendli
,
Peter Buchmann
,
Marcel A. Kossel
,
Thomas Morf
A 14Gb/s high-swing thin-oxide device SST TX in 45nm CMOS SOI.
ISSCC
(2011)
Robert Reutemann
,
Michael Ruegg
,
Fran Keyser
,
John Bergkvist
,
Daniel Dreps
,
Thomas Toifl
,
Martin L. Schmatz
A 4.5 mW/Gb/s 6.4 Gb/s 22+1-Lane Source Synchronous Receiver Core With Optional Cleanup PLL in 65 nm CMOS.
IEEE J. Solid State Circuits
45 (12) (2010)
Robert Reutemann
,
Michael Ruegg
,
Fran Keyser
,
John Bergkvist
,
Daniel Dreps
,
Thomas Toifl
,
Martin L. Schmatz
A 4.5mW/Gb/s 6.4Gb/s 22+1-lane source-synchronous link rx core with optional cleanup PLL in 65nm CMOS.
ISSCC
(2010)
Thomas Toifl
,
Christian Menolfi
,
Michael Ruegg
,
Robert Reutemann
,
Peter Buchmann
,
Marcel A. Kossel
,
Thomas Morf
,
Jonas R. M. Weiss
,
Martin L. Schmatz
A 22-gb/s PAM-4 receiver in 90-nm CMOS SOI technology.
IEEE J. Solid State Circuits
41 (4) (2006)
Eva Tatschl-Unterberger
,
Sasan Cyrusian
,
Michael Ruegg
A 2.5GHz phase-switching PLL using a supply controlled 2-delay-stage 10GHz ring oscillator for improved jitter/mismatch.
ISCAS (6)
(2005)
Thomas Toifl
,
Christian Menolfi
,
Peter Buchmann
,
Marcel A. Kossel
,
Thomas Morf
,
Robert Reutemann
,
Michael Ruegg
,
Martin L. Schmatz
,
Jonas R. M. Weiss
A 0.94-ps-RMS-jitter 0.016-mm/sup 2/ 2.5-GHz multiphase generator PLL with 360/spl deg/ digitally programmable phase shift for 10-Gb/s serial links.
IEEE J. Solid State Circuits
40 (12) (2005)