Login / Signup
A 2.5GHz phase-switching PLL using a supply controlled 2-delay-stage 10GHz ring oscillator for improved jitter/mismatch.
Eva Tatschl-Unterberger
Sasan Cyrusian
Michael Ruegg
Published in:
ISCAS (6) (2005)
Keyphrases
</>
high speed
frequency band
intel xeon
end to end
improved algorithm
feedback loop
end to end delay
final stage
dual band
data sets
genetic algorithm
feature vectors