Masamitsu Tanaka

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 23

Top Topics

Content Addressable

Error Correction

Integrated Circuit

Top Venues

IEICE Trans. Electron.

Publications

Yosuke Ueno, Satoshi Imamura, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
SFQ counter-based precomputation for large-scale cryogenic VQE machines. CoRR (2024)
Satoshi Kawakami, Yusuke Ohtusbo, Koji Inoue, Masamitsu Tanaka
Late Breaking Results: Single Flux Quantum Based Brownian Circuits for Ultra-Law-Power Computing. DATE (2024)
Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
Inter-Temperature Bandwidth Reduction in Cryogenic QAOA Machines. IEEE Comput. Archit. Lett. 23 (1) (2024)
Dongmoon Min, Junpyo Kim, Junhyuk Choi, Ilkwon Byun, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
QIsim: Architecting 10+K Qubit QC Interfaces Toward Quantum Supremacy. ISCA (2023)
Yasunari Suzuki, Yosuke Ueno, Wang Liao, Masamitsu Tanaka, Teruo Tanimoto
Circuit designs for practical-scale fault-tolerant quantum computing. VLSI Technology and Circuits (2023)
Masamitsu Tanaka, Yoshihiro Kitagawa, Tetsuro Satoh, Tsuyoshi Yamamoto
Nb/AlOx/Nb Planarization Process. ICICDT (2023)
Yosuke Ueno, Yuna Tomida, Teruo Tanimoto, Masamitsu Tanaka, Yutaka Tabuchi, Koji Inoue, Hiroshi Nakamura
Inter-temperature Bandwidth Reduction in Cryogenic QAOA Machines. CoRR (2023)
Ilkwon Byun, Junpyo Kim, Dongmoon Min, Ikki Nagaoka, Kosuke Fukumitsu, Iori Ishikawa, Teruo Tanimoto, Masamitsu Tanaka, Koji Inoue, Jangwoo Kim
XQsim: modeling cross-technology control processors for 10+K qubit quantum computers. ISCA (2022)
Iori Ishikawa, Ikki Nagaoka, Ryota Kashima, Koki Ishida, Kosuke Fukumitsu, Keitaro Oka, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Akira Fujimaki, Koji Inoue
Design of Variable Bit-Width Arithmetic Unit Using Single Flux Quantum Device. ISCAS (2022)
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
QULATIS: A Quantum Error Correction Methodology toward Lattice Surgery. HPCA (2022)
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
NEO-QEC: Neural Network Enhanced Online Superconducting Decoder for Surface Codes. CoRR (2022)
Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue
Superconductor Computing for Neural Networks. IEEE Micro 41 (3) (2021)
Shuichi Nagasawa, Masamitsu Tanaka, Naoki Takeuchi, Yuki Yamanashi, Shigeyuki Miyajima, Fumihiro China, Taiki Yamae, Koki Yamazaki, Yuta Somei, Naonori Sega, Yoshinao Mizugaki, Hiroaki Myoren, Hirotaka Terai, Mutsuo Hidaka, Nobuyuki Yoshikawa, Akira Fujimaki
Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation. IEICE Trans. Electron. (9) (2021)
Yosuke Ueno, Masaaki Kondo, Masamitsu Tanaka, Yasunari Suzuki, Yutaka Tabuchi
QECOOL: On-Line Quantum Error Correction with a Superconducting Decoder for Surface Code. DAC (2021)
Koki Ishida, Masamitsu Tanaka, Ikki Nagaoka, Takatsugu Ono, Satoshi Kawakami, Teruo Tanimoto, Akira Fujimaki, Koji Inoue
32 GHz 6.5 mW Gate-Level-Pipelined 4-Bit Processor using Superconductor Single-Flux-Quantum Logic. VLSI Circuits (2020)
Koki Ishida, Ilkwon Byun, Ikki Nagaoka, Kosuke Fukumitsu, Masamitsu Tanaka, Satoshi Kawakami, Teruo Tanimoto, Takatsugu Ono, Jangwoo Kim, Koji Inoue
SuperNPU: An Extremely Fast Neural Processing Unit Using Superconducting Logic Devices. MICRO (2020)
Ikki Nagaoka, Masamitsu Tanaka, Koji Inoue, Akira Fujimaki
A 48GHz 5.6mW Gate-Level-Pipelined Multiplier Using Single-Flux Quantum Logic. ISSCC (2019)
Tomohiro Kamiya, Masamitsu Tanaka, Kyosuke Sano, Akira Fujimaki
-Shifted Josephson Junctions. IEICE Trans. Electron. (5) (2018)
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue
Towards Ultra-High-Speed Cryogenic Single-Flux-Quantum Computing. IEICE Trans. Electron. (5) (2018)
Kyosuke Sano, Masato Suzuki, Kohei Maruyama, Soya Taniguchi, Masamitsu Tanaka, Akira Fujimaki, Masumi Inoue, Nobuyuki Yoshikawa
Thermally Assisted Superconductor Transistors for Josephson-CMOS Hybrid Memories. IEICE Trans. Electron. (5) (2018)
Koki Ishida, Masamitsu Tanaka, Takatsugu Ono, Koji Inoue
Single-flux-quantum cache memory architecture. ISOCC (2016)
Ali Bozbey, Yuma Kita, Kyohei Kamiya, Misaki Kozaka, Masamitsu Tanaka, Takekazu Ishida, Akira Fujimaki
Development of an Advanced Circuit Model for Superconducting Strip Line Detector Arrays. IEICE Trans. Electron. (6) (2016)
Masamitsu Tanaka, Kazuyoshi Takagi, Naofumi Takagi
High-Throughput Rapid Single-Flux-Quantum Circuit Implementations for Exponential and Logarithm Computation Using the Radix-2 Signed-Digit Representation. IEICE Trans. Electron. (6) (2016)
Masamitsu Tanaka, Atsushi Kitayama, Masakazu Okada, Tomohito Kouketsu, Takumi Takinami, Masato Ito, Akira Fujimaki
Nb Process Technology. IEICE Trans. Electron. (3) (2014)
Akira Fujimaki, Masamitsu Tanaka, Ryo Kasagi, Katsumi Takagi, Masakazu Okada, Yuhi Hayakawa, Kensuke Takata, Hiroyuki Akaike, Nobuyuki Yoshikawa, Shuichi Nagasawa, Kazuyoshi Takagi, Naofumi Takagi
Large-Scale Integrated Circuit Design Based on a Nb Nine-Layer Structure for Reconfigurable Data-Path Processors. IEICE Trans. Electron. (3) (2014)
Kazuyoshi Takagi, Yuki Ito, Shota Takeshima, Masamitsu Tanaka, Naofumi Takagi
Layout-Driven Skewed Clock Tree Synthesis for Superconducting SFQ Circuits. IEICE Trans. Electron. (3) (2011)
Naofumi Takagi, Masamitsu Tanaka
Comparisons of Synchronous-Clocking SFQ Adders. IEICE Trans. Electron. (4) (2010)
Masamitsu Tanaka, Koji Obata, Yuki Ito, Shota Takeshima, Motoki Sato, Kazuyoshi Takagi, Naofumi Takagi, Hiroyuki Akaike, Akira Fujimaki
Automated Passive-Transmission-Line Routing Tool for Single-Flux-Quantum Circuits Based on A* Algorithm. IEICE Trans. Electron. (4) (2010)
Yuki Yamanashi, Toshiki Kainuma, Nobuyuki Yoshikawa, Irina Kataeva, Hiroyuki Akaike, Akira Fujimaki, Masamitsu Tanaka, Naofumi Takagi, Shuichi Nagasawa, Mutsuo Hidaka
Nb Multi-Layer Process. IEICE Trans. Electron. (4) (2010)
Heejoung Park, Yuki Yamanashi, Nobuyuki Yoshikawa, Masamitsu Tanaka, Akira Fujimaki
Design of fast digit-serial adders using SFQ logic circuits. IEICE Electron. Express 6 (19) (2009)
Akira Fujimaki, Masamitsu Tanaka, Takahiro Yamada, Yuki Yamanashi, Heejoung Park, Nobuyuki Yoshikawa
Bit-Serial Single Flux Quantum Microprocessor CORE. IEICE Trans. Electron. (3) (2008)