Planarized Nb 4-Layer Fabrication Process for Superconducting Integrated Circuits and Its Fabricated Device Evaluation.
Shuichi NagasawaMasamitsu TanakaNaoki TakeuchiYuki YamanashiShigeyuki MiyajimaFumihiro ChinaTaiki YamaeKoki YamazakiYuta SomeiNaonori SegaYoshinao MizugakiHiroaki MyorenHirotaka TeraiMutsuo HidakaNobuyuki YoshikawaAkira FujimakiPublished in: IEICE Trans. Electron. (2021)