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Design of fast digit-serial adders using SFQ logic circuits.
Heejoung Park
Yuki Yamanashi
Nobuyuki Yoshikawa
Masamitsu Tanaka
Akira Fujimaki
Published in:
IEICE Electron. Express (2009)
Keyphrases
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logic circuits
functional decomposition
gate array
real time
low power
logic synthesis
user interface
low cost
design methodology
circuit design
programmable logic