Kyeongho Lee

Publication Activity (10 Years)

Years Active: 1995-2024
Publications (10 Years): 14

Top Topics

Content Addressable

Printed Circuit

Top Venues

Publications

Kyeongho Lee, Joonhyung Kim, Jongsun Park
A 28-nm 50.1-TOPS/W P-8T SRAM Compute-In-Memory Macro Design With BL Charge-Sharing-Based In-SRAM DAC/ADC Operations. IEEE J. Solid State Circuits 59 (6) (2024)
Junhyun Song, Kyeongho Lee, Jongsun Park
Low Area and Low Power Threshold Implementation Design Technique for AES S-Box. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Sungsoo Cheon, Kyeongho Lee, Jongsun Park
A 2941-TOPS/W Charge-Domain 10T SRAM Compute-in-Memory for Ternary Neural Network. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Hyunchul Park, Kyeongho Lee, Jongsun Park
A 10T SRAM Compute-In-Memory Macro with Analog MAC Operation and Time Domain Conversion. AICAS (2022)
Joonhyung Kim, Kyeongho Lee, Jongsun Park
A Charge Domain P-8T SRAM Compute-In-Memory with Low-Cost DAC/ADC Operation for 4-bit Input Processing. ISLPED (2022)
Kyeongho Lee, Joonhyung Kim, Jongsun Park
Low-Cost 7T-SRAM Compute-in-Memory Design Based on Bit-Line Charge-Sharing Based Analog-to-Digital Conversion. ICCAD (2022)
Joonhyung Kim, Kyeongho Lee, Jongsun Park
A Charge Domain P-8T SRAM Compute-In-Memory with Low-Cost DAC/ADC Operation for 4-bit Input Processing. CoRR (2022)
Kyeongho Lee, Woong Choi, Jongsun Park
A 65-nm 0.6-fJ/Bit/Search Ternary Content Addressable Memory Using an Adaptive Match-Line Discharge. IEEE J. Solid State Circuits 56 (8) (2021)
Kyeongho Lee, Sungsoo Cheon, Joongho Jo, Woong Choi, Jongsun Park
A Charge-Sharing based 8T SRAM In-Memory Computing for Edge DNN Acceleration. DAC (2021)
Kyeongho Lee, Jinho Jeong, Sungsoo Cheon, Woong Choi, Jongsun Park
Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision. DAC (2020)
Kyeongho Lee, Jinho Jeong, Sungsoo Cheon, Woong Choi, Jongsun Park
Bit Parallel 6T SRAM In-memory Computing with Reconfigurable Bit-Precision. CoRR (2020)
Kyeongho Lee, Geon Ko, Jongsun Park
Low Cost Ternary Content Addressable Memory Based on Early Termination Precharge Scheme. ISCAS (2019)
Woong Choi, Kyeongho Lee, Jongsun Park
Low Cost Ternary Content Addressable Memory Using Adaptive Matchline Discharging Scheme. ISCAS (2018)
Woong Choi, Kwanghyo Jeong, Kyungrak Choi, Kyeongho Lee, Jongsun Park
Content addressable memory based binarized neural network accelerator using time-domain signal processing. DAC (2018)
Dong-Gun Lee, Kyeongho Lee, Soo-Young Lee
Implicit Shopping Intention Recognition with Eye Tracking Data and Response Time. HAI (2015)
Suh-Yeon Dong, Bo-Kyeong Kim, Kyeongho Lee, Soo-Young Lee
A Preliminary Study on Human Trust Measurements by EEG for Human-Machine Interactions. HAI (2015)
Taesang Choi, Sangsik Yoon, Dongwon Kang, Sangwan Kim, Joonkyung Lee, Kyeongho Lee
Wire-speed application flow generation in hardware platform for multi-gigabit traffic monitoring. NOMS (2008)
Taesang Choi, Sangsik Yoon, Dongwon Kang, Sangwan Kim, Joonkyung Lee, Kyeongho Lee
Novel Traffic Measurement Methodology for High Precision Applications Awareness in Multi-gigabit Networks. APNOMS (2006)
Hyungki Huh, Yido Koo, Kang-Yoon Lee, Yeonkyeong Ok, Sungho Lee, Daehyun Kwon, Jeongwoo Lee, Joonbae Park, Kyeongho Lee, Deog-Kyoon Jeong, Wonchan Kim
Comparison frequency doubling and charge pump matching techniques for dual-band /spl Delta//spl Sigma/ fractional-N frequency synthesizer. IEEE J. Solid State Circuits 40 (11) (2005)
Kang-Yoon Lee, Seung-Wook Lee, Yido Koo, Hyoung-Ki Huh, Hee-Young Nam, Jeong-Woo Lee, Joonbae Park, Kyeongho Lee, Deog-Kyoon Jeong, Wonchan Kim
Full-CMOS 2-GHz WCDMA direct conversion transmitter and receiver. IEEE J. Solid State Circuits 38 (1) (2003)
Yido Koo, Hyungki Huh, Yongsik Cho, Jeongwoo Lee, Joonbae Park, Kyeongho Lee, Deog-Kyoon Jeong, Wonchan Kim
A fully integrated CMOS frequency synthesizer with charge-averaging charge pump and dual-path loop filter for PCS- and cellular-CDMA wireless systems. IEEE J. Solid State Circuits 37 (5) (2002)
Kyeongho Lee, Joonbae Park, Jeong-Woo Lee, Seung-Wook Lee, Hyung Ki Huh, Deog-Kyoon Jeong, Wonchan Kim
A single-chip 2.4-GHz direct-conversion CMOS receiver for wireless local loop using multiphase reduced frequency conversion technique. IEEE J. Solid State Circuits 36 (5) (2001)
Yongsam Moon, Jongsang Choi, Kyeongho Lee, Deog-Kyoon Jeong, Min-Kyu Kim
An all-analog multiphase delay-locked loop using a replica delay line for wide-range operation and low-jitter performance. IEEE J. Solid State Circuits 35 (3) (2000)
Yongsam Moon, Jongsang Choi, Kyeongho Lee, Deog-Kyoon Jeong, Min-Kyu Kim
A 62.5-250 MHz multi-phase delay-locked loop using a replica delay line with triply controlled delay cells. CICC (1999)
Kyeongho Lee, Yeshik Shin, Sungjoon Kim, Deog-Kyoon Jeong, Gyudong Kim, Bruce Kim, Victor Da Costa
1.04 GBd low EMI digital video interface system using small swing serial link technique. IEEE J. Solid State Circuits 33 (5) (1998)
Sungjoon Kim, Kyeongho Lee, Yongsam Moon, Deog-Kyoon Jeong, Yunho Choi, Hyung Kyu Lim
A 960-Mb/s/pin interface for skew-tolerant bus using low jitter PLL. IEEE J. Solid State Circuits 32 (5) (1997)
Kyeongho Lee, Sungjoon Kim, Gijung Ahn, Deog-Kyoon Jeong
A CMOS serial link for fully duplexed data communication. IEEE J. Solid State Circuits 30 (4) (1995)