Kuan Zhou

Publication Activity (10 Years)

Years Active: 2002-2019
Publications (10 Years): 1

Top Topics

Heterogeneous Computing

Gpu Implementation

Enabling Technology

Top Venues

ISPA/BDCloud/SocialCom/SustainCom

Publications

Juan Fang, Kuan Zhou, Chen Tan, Hui Zhao
Dynamic Block Size Adjustment and Workload Balancing Strategy Based on CPU-GPU Heterogeneous Platform. ISPA/BDCloud/SocialCom/SustainCom (2019)
Mitchell R. LeRoy, Srikumar Raman, Michael Chu, Jin Woo Kim, Jong-Ru Guo, Kuan Zhou, Chao You, Ryan Clarke, Bryan S. Goda, John F. McDonald
High-Speed Reconfigurable Circuits for Multirate Systems in SiGe HBT Technology. Proc. IEEE 103 (7) (2015)
Yicong Meng, Kuan Zhou, Joshua J. C. Monzon, Chi-Sang Poon
Iono-neuromorphic implementation of spike-timing-dependent synaptic plasticity. EMBC (2011)
Ra'ed Al-Dujaily, Terrence S. T. Mak, Kuan Zhou, Kai-Pui Lam, Yicong Meng, Alexandre Yakovlev, Chi-Sang Poon
On-chip dynamic programming networks using 3D-TSV integration. ICSAMOS (2011)
Gang Chen, Yifei Luo, Jiayin Tian, Kuan Zhou
A 10B 200MHz pipeline ADC with minimal feedback penalty and 0.35pJ/conversion-step. SoCC (2010)
Yifei Luo, Gang Chen, Kuan Zhou
A picosecond TDC architecture for multiphase PLLs. ACM Great Lakes Symposium on VLSI (2009)
Kuan Zhou, John F. McDonald
Impact of Deep-Trench-Isolation-Sharing Techniques on Ultrahigh-Speed Digital Systems. IEEE Trans. Circuits Syst. II Express Briefs (10) (2009)
Kuan Zhou, Yifei Luo, Sizhong Chen, Allen Drake, John F. McDonald, Tong Zhang
Triple-rail MOS current mode logic for high-speed self-timed pipeline applications. ISCAS (2006)
Jong-Ru Guo, Chao You, Kuan Zhou, Michael Chu, Peter F. Curran, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
A 10 GHz 4: 1 MUX and 1: 4 DEMUX implemented by a Gigahertz SiGe FPGA for fast ADC. Integr. 38 (3) (2005)
Kuan Zhou, John F. McDonald
Multi-GHz SiGe design methodologies for reconfigurable computing. ACM Great Lakes Symposium on VLSI (2005)
Kuan Zhou, Jong-Ru Guo, Chao You, John Mayega, Russell P. Kraft, T. Zhang, John F. McDonald, Bryan S. Goda
Multi-ghz Sige Bicmos Fpgas with New Architecture and Novel Power Management Techniques. J. Circuits Syst. Comput. 14 (2) (2005)
Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Peter F. Curran, Kuan Zhou, Bryan S. Goda, John F. McDonald
A 5-10GHz SiGe BiCMOS FPGA with new configurable logic block. Microprocess. Microsystems 29 (2-3) (2005)
Jong-Ru Guo, Chao You, Michael Chu, Robert W. Heikaus, Kuan Zhou, Okan Erdogan, Jiedong Diao, Bryan S. Goda, Russell P. Kraft, John F. McDonald
The gigahertz FPGA: design consideration and applications. FPGA (2004)
Jong-Ru Guo, Chao You, Peter F. Curran, Michael Chu, Kuan Zhou, Jiedong Diao, A. George, Russell P. Kraft, John F. McDonald
The 10GHz 4: 1 MUX and 1: 4 DEMUX implemented via the gigahertz SiGe FPGA. ACM Great Lakes Symposium on VLSI (2004)
John Mayega, Okan Erdogan, Paul M. Belemjian, Kuan Zhou, John F. McDonald, Russell P. Kraft
3D direct vertical interconnect microprocessors test vehicle. ACM Great Lakes Symposium on VLSI (2003)
Kuan Zhou, Michael Chu, Chao You, Jong-Ru Guo, Channakeshav, John Mayega, John F. McDonald, Russell P. Kraft, Bryan S. Goda
A four-bit full adder implemented on fast SiGe FPGAs with novel power control scheme. FPGA (2003)
Jong-Ru Guo, Chao You, Kuan Zhou, Bryan S. Goda, Russell P. Kraft, John F. McDonald
A scalable 2 V, 20 GHz FPGA using SiGe HBT BiCMOS technology. FPGA (2003)
Jong-Ru Guo, Chao You, Michael Chu, Kuan Zhou, Young Uk Yim, Robert W. Heikaus, Russell P. Kraft, John F. McDonald
A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA. Engineering of Reconfigurable Systems and Algorithms (2003)
Chao You, Jong-Ru Guo, Russell P. Kraft, Kuan Zhou, Michael Chu, John F. McDonald
A 5-20 GHz, low power FPGA implemented by SiGe HBT BiCMOS technology. ACM Great Lakes Symposium on VLSI (2003)
Chao You, Jong-Ru Guo, Russell P. Kraft, Michael Chu, Robert W. Heikaus, Okan Erdogan, Peter F. Curran, Bryan S. Goda, Kuan Zhou, John F. McDonald
Gigahertz FPGA by SiGe BiCMOS Technology for Low Power, High Speed Computing with 3-D Memory. FPL (2003)
Kuan Zhou, Channakeshav, Michael Chu, Jong-Ru Guo, S.-C. Liu, Russell P. Kraft, Chao You, John F. McDonald
Gigahertz SiGe BiCMOS FPGAs with new architectures and novel power management schemes. FPT (2002)
Channakeshav, Kuan Zhou, Russell P. Kraft, John F. McDonald
Gigahertz FPGAs with New Power Saving Techniques and Decoding Logic. Evolvable Hardware (2002)
Channakeshav, Kuan Zhou, Jong-Ru Guo, Chao You, Bryan S. Goda, Russell P. Kraft, John F. McDonald
Fast SiGe HBT BiCMOS FPGAs with New Architecture and Power Saving Techniques. FPL (2002)