A Novel Multi-Speed, Power Saving Architecture for SiGe HBT FPGA.
Jong-Ru GuoChao YouMichael ChuKuan ZhouYoung Uk YimRobert W. HeikausRussell P. KraftJohn F. McDonaldPublished in: Engineering of Reconfigurable Systems and Algorithms (2003)
Keyphrases
- power saving
- power reduction
- high speed
- power consumption
- real time
- hardware architecture
- hardware implementation
- management system
- multi threaded
- energy efficiency
- wireless communication
- pipelined architecture
- xilinx virtex
- energy saving
- field programmable gate array
- scheduling algorithm
- fine grained
- low power
- response time