Kimihiko Kato

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 10

Top Topics

Top Venues

VLSI Technology and Circuits

Publications

Shunsuke Shitakata, Hiroshi Oka, Kimihiko Kato, Takumi Inaba, Shota Iizuka, Hidehiro Asai, Takahiro Mori
Occurrence and Mitigation of Hot Carrier Degradation in Cryogenic MOSFET Operation. DRC (2024)
Takumi Inaba, Hiroshi Oka, Hidehiro Asai, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Shunsuke Shitakata, Koichi Fukuda, Takahiro Mori
Temperature Dependent Variations of Low-Frequency Noise Sources in Cryogenic Short-Channel Bulk MOSFETs. IEEE Access 12 (2024)
Hiroshi Oka, Takumi Inaba, Shunsuke Shitakata, Kimihiko Kato, Shota Iizuka, Hidehiro Asai, Hiroshi Fuketa, Takahiro Mori
Origin of Low-Frequency Noise in Si n-MOSFET at Cryogenic Temperatures: The Effect of Interface Quality. IEEE Access 11 (2023)
Takumi Inaba, Hiroshi Oka, Hidehiro Asai, Hiroshi Fuketa, Shota Iizuka, Kimihiko Kato, Shunsuke Shitakata, Koichi Fukuda, Takahiro Mori
Determining the low-frequency noise source in cryogenic operation of short-channel bulk MOSFETs. VLSI Technology and Circuits (2023)
Shimpei Nishiyama, Kimihiko Kato, Yongxun Liu, Raisei Mizokuchi, Jun Yoneda, Tetsuo Kodera, Takahiro Mori
Single-Electron Transistor Operation of a Physically Defined Silicon Quantum Dot Device Fabricated by Electron Beam Lithography Employing a Negative-Tone Resist. IEICE Trans. Electron. 106 (10) (2023)
Hiroshi Oka, Takumi Inaba, Shota Iizuka, Hidehiro Asai, Kimihiko Kato, Takahiro Mori
Effect of Conduction Band Edge States on Coulomb-Limiting Electron Mobility in Cryogenic MOSFET Operation. VLSI Technology and Circuits (2022)
Shota Iizuka, Kimihiko Kato, Atsushi Yagishita, Hidehiro Asai, Tetsuya Ueda, Hiroshi Oka, Junichi Hattori, Tsutomu Ikegami, Koichi Fukuda, Takahiro Mori
Buried nanomagnet realizing high-speed/low-variability silicon spin qubits: implementable in error-correctable large-scale quantum computers. VLSI Circuits (2021)
Shinichi Takagi, Kimihiko Kato, Kei Sumita, Kwangwon Jo, Cheol-Min Lim, Ryotaro Takaguchi, Dae-Hwan Ahn, Jun Takeyasu, Kasidit Toprasertpong, Mitsuru Takenaka
Advanced MOS Device Technology for Low Power Logic LSI. MIXDES (2019)
Kei Sumita, Jun Takeyasu, Kimihiko Kato, Kasidit Toprasertpong, Mitsuru Takenaka, Shinichi Takagi
Fabrication of High Quality InAs-on-Lnsulator Structures by Smart Cut Process with Reuse of InAs Wafers. 3DIC (2019)
Shinichi Takagi, Kimihiko Kato, Wu-Kang Kim, Kwangwon Jo, Ryo Matsumura, Ryotaro Takaguchi, Dae-Hwan Ahn, Takahiro Gotow, Mitsuru Takenaka
MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI. ESSDERC (2018)