MOS Device Technology using Alternative Channel Materials for Low Power Logic LSI.
Shinichi TakagiKimihiko KatoWu-Kang KimKwangwon JoRyo MatsumuraRyotaro TakaguchiDae-Hwan AhnTakahiro GotowMitsuru TakenakaPublished in: ESSDERC (2018)
Keyphrases
- low power
- wireless transmission
- logic circuits
- cmos technology
- power consumption
- high speed
- gate array
- low cost
- ultra low power
- flip flops
- single chip
- high power
- delay insensitive
- nm technology
- multi channel
- low power consumption
- digital signal processing
- vlsi circuits
- mixed signal
- vlsi architecture
- digital circuits
- field effect transistors
- low voltage
- power reduction
- jpeg images
- power dissipation
- wireless networks
- real time