Joan Carletta

Publication Activity (10 Years)

Years Active: 1994-2017
Publications (10 Years): 4

Top Topics

High Dynamic Range

Gradient Domain

Top Venues

J. Real Time Image Process.

Image Processing: Algorithms and Systems

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Abdullah Kurtoglu, Joan Carletta, Kye-Shin Lee
Energy consumption in long-range linear wireless sensor networks using LoRaWan and ZigBee. MWSCAS (2017)
Sainath Reddy Samireddy, Joan Carletta, Kye-Shin Lee
An embeddable algorithm for gunshot detection. MWSCAS (2017)
Taohid Latif, Nathan Ida, Kye-Shin Lee, Joan Carletta
A current and vibration based detection system for lightning strikes on transmission towers. MWSCAS (2017)
Jian Liu, Firas Hassan, Joan Carletta
A study of hardware-friendly methods for gradient domain tone mapping of high dynamic range images. J. Real Time Image Process. 12 (1) (2016)
Jian Liu, Firas Hassan, Joan Carletta
Embedding high dynamic range tone mapping in JPEG compression. Image Processing: Algorithms and Systems (2013)
Shiva Sai Bethi, Kye-Shin Lee, Robert J. Veillette, Joan Carletta, Mike Willett
A temperature and process insensitive CMOS reference current generator. MWSCAS (2013)
Lavanya Vytla, Firas Hassan, Joan Carletta
A real-time implementation of gradient domain high dynamic range compression using a local Poisson solver. J. Real Time Image Process. 8 (2) (2013)
Cindy X. Jiang, Joan Carletta, Tom T. Hartley, Robert J. Veillette
A Systematic Approach for Implementing Fractional-Order Operators and Systems. IEEE J. Emerg. Sel. Topics Circuits Syst. 3 (3) (2013)
Bo Liu, Matthew Kollarits, Robert J. Veillette, Joan Carletta, Kye-Shin Lee
A high-temperature comparator with rail-to-rail input voltage range. MWSCAS (2013)
Arjuna Madanayake, Chamith Wijenayake, Rimesh M. Joshi, Jim Grover, Joan Carletta, Jay L. Adams, Tom T. Hartley, Tokunbo Ogunfunmi
Teaching freshmen VHDL-based digital design. ISCAS (2012)
Firas Hassan, Lavanya Vytla, Joan Carletta
Exploiting redundancy to solve the Poisson equation using local information. ICIP (2009)
Firas Hassan, Joan Carletta
High throughput JPEG2000 compatible encoder for high dynamic range images. ICIP (2008)
Krishnaraj Varma, Hima B. Damecharla, Amy E. Bell, Joan Carletta, Godmar V. Back
A Fast JPEG2000 Encoder That Preserves Coding Efficiency: The Split Arithmetic Encoder. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2008)
Firas Hassan, Joan Carletta
A High Throughput Encoder for High Dynamic Range Images. ICIP (6) (2007)
Firas Hassan, Joan Carletta
An FPGA-based architecture for a local tone-mapping operator. J. Real Time Image Process. 2 (4) (2007)
Firas Hassan, Joan Carletta
A real-time FPGA-based architecture for a Reinhard-like tone mapping operator. Graphics Hardware (2007)
Krishnaraj Varma, Amy E. Bell, Hima B. Damecharla, Joan Carletta
A Fast JPEG2000 EBCOT Tier-1 Architecture That Preserves Coding Efficiency. ICIP (2006)
Hima B. Damecharla, Kamal K. Varma, Joan Carletta, Amy E. Bell
FPGA implementation of a parallel EBCOT tier-1 encoder that preserves coding efficiency. ACM Great Lakes Symposium on VLSI (2006)
Kishore A. Kotteri, Amy E. Bell, Joan Carletta
Multiplierless filter Bank design: structures that improve both hardware and image compression performance. IEEE Trans. Circuits Syst. Video Technol. 16 (6) (2006)
Kishore A. Kotteri, Sankar Barua, Amy E. Bell, Joan Carletta
A comparison of hardware implementations of the biorthogonal 9/7 DWT: convolution versus lifting. IEEE Trans. Circuits Syst. II Express Briefs (5) (2005)
Zhengwei Fang, Joan Carletta, Robert J. Veillette
A methodology for FPGA-based control implementation. IEEE Trans. Control. Syst. Technol. 13 (6) (2005)
Sankar Barua, Joan Carletta, Kishore A. Kotteri, Amy E. Bell
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms. Integr. 38 (3) (2005)
Sankar Barua, Joan Carletta, Kishore A. Kotteri, Amy E. Bell
An efficient architecture for lifting-based two-dimensional discrete wavelet transforms. ACM Great Lakes Symposium on VLSI (2004)
Sankar Barua, Kishore A. Kotteri, Amy E. Bell, Joan Carletta
Optimal quantized lifting coefficients for the 9/7 wavelet [image compression applications]. ICASSP (5) (2004)
Kishore A. Kotteri, Amy E. Bell, Joan Carletta
Polyphase structures for multiplierless biorthogonal filter banks [image compression applications]. ICASSP (5) (2004)
Kishore A. Kotteri, Amy E. Bell, Joan Carletta
Design of multiplierless, high-performance, wavelet filter banks with image compression applications. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2004)
Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang
Implementation of digital fixed-point approximations to continuous-time IIR filters. FPGA (2003)
Kishore A. Kotteri, Amy E. Bell, Joan Carletta
Quantized FIR filter design using compensating zeros. IEEE Signal Process. Mag. 20 (6) (2003)
F. Krach, B. Frackelton, Joan Carletta, Robert Veillette
FPGA-based implementation of digital control for a magnetic bearing. ACC (2003)
Joan Carletta, Robert J. Veillette, Frederick W. Krach, Zhengwei Fang
Determining appropriate precisions for signals in fixed-point IIR filters. DAC (2003)
Joan Carletta, M. D. Rayman
Practical Considerations in the Synthesis of High Performance Digital Filters for Implementation on FPGAs. FPL (2002)
Mehrdad Nourani, Joan Carletta, Christos A. Papachristou
Integrated test of interacting controllers and datapaths. ACM Trans. Design Autom. Electr. Syst. 6 (3) (2001)
Mehrdad Nourani, Joan Carletta, Christos A. Papachristou
Synthesis-for-testability of controller-datapath pairs that use gated clocks. DAC (2000)
John T. Welch, Joan Carletta
A Direct Mapping FPGA Architecture for Industrial Process Control Applications. ICCD (2000)
Elie Yarack, Joan Carletta
An Evaluation of Move-Based Multi-Way Partitioning Algorithms. ICCD (2000)
Joan Carletta, Christos A. Papachristou, Mehrdad Nourani
Detecting Undetectable Controller Faults Using Power Analysis. DATE (2000)
Joan Carletta, Mehrdad Nourani, Christos A. Papachristou
Synthesis of Controllers for Full Testability of Integrated Datapath-Controller Pairs. DATE (1999)
Mehrdad Nourani, Joan Carletta, Christos A. Papachristou
A Scheme for Integrated Controller-Datapath Fault Testing. DAC (1997)
Joan Carletta, Christos A. Papachristou
Behavioral Testability Insertion for Datapath/Controller Circuits. J. Electron. Test. 11 (1) (1997)
Christos A. Papachristou, Joan Carletta
Test Synthesis in the Behavioral Domain. ITC (1995)
Joan Carletta, Christos A. Papachristou
Testability analysis and insertion for RTL circuits based on pseudorandom BIST. ICCD (1995)
Joan Carletta, Christos A. Papachristou
A method for testability analysis and BIST insertion at the RTL. ED&TC (1995)
Joan Carletta, Christos A. Papachristou
Structural constraints for circular self-test paths. VTS (1995)
Joan Carletta, Christos A. Papachristou
Structural constraints for circular self-test paths. VTS (1994)