FPGA implementation of a parallel EBCOT tier-1 encoder that preserves coding efficiency.
Hima B. DamecharlaKamal K. VarmaJoan CarlettaAmy E. BellPublished in: ACM Great Lakes Symposium on VLSI (2006)
Keyphrases
- coding efficiency
- bit rate
- fpga implementation
- rate distortion
- error resilience
- distributed video coding
- bit plane
- high coding efficiency
- macroblock
- motion estimation
- video coding
- image coding
- bitstream
- error propagation
- hardware implementation
- visual quality
- motion vectors
- inter frame
- mpeg avc
- video coding standard
- mode decision
- intra coding
- low bit rate
- low complexity
- image quality
- mode selection
- compression efficiency
- rate control
- video quality
- computational complexity
- subband
- bit allocation
- video codec
- coding method
- coding scheme
- video transmission
- scalable video coding
- transform domain
- image processing
- error resilient
- computer vision
- video compression
- compression ratio
- motion compensation
- field programmable gate array
- block size
- parallel computing
- shared memory
- compression algorithm
- bit rate reduction
- selection algorithm
- efficient implementation
- error control
- wavelet coefficients
- variable block size
- video data
- real time