Jiri Jenícek

Publication Activity (10 Years)

Years Active: 2006-2020
Publications (10 Years): 5

Top Topics

Data Compression

Pipelined Architecture

Statistical Significance

Statistical Tests

Top Venues

Publications

Tomás Jakubík, Jiri Jenícek
Feasibility of OFDM and FHSS in a Single Home Automation and Security Network. TSP (2020)
Tomás Jakubík, Jiri Jenícek
SDR All-channels Receiver for FHSS Sensor Network in Cortex-M. TSP (2019)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
Sequential Test Decompressors with Fast Tester Bits Wide-Spreading. J. Circuits Syst. Comput. 26 (8) (2017)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
Sequential test decompressors with fast variable wide spreading. DDECS (2016)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
Test Decompressor Effectivity Improvement. DSD (2016)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
LFSR Reseeding Based Test Compression Respecting Different Controllability of Decompressor Outputs. DDECS (2015)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
Test compression for circuits with multiple scan chains. LATS (2015)
Ondrej Novák, Jiri Jenícek, Martin Rozkovec
Test-data compression with low number of channels and short test time. DDECS (2014)
Martin Chloupek, Jiri Jenícek, Ondrej Novák, Martin Rozkovec
Test pattern decompression in parallel scan chain architecture. DDECS (2013)
Martin Rozkovec, Jiri Jenícek, Ondrej Novák
An evaluation of the application dependent FPGA test method. DDECS (2012)
Martin Chloupek, Ondrej Novák, Jiri Jenícek
On test time reduction using pattern overlapping, broadcasting and on-chip decompression. DDECS (2012)
Jiri Jenícek, Ondrej Novák, Martin Chloupek
Advanced scan chain configuration method for broadcast decompressor architecture. EWDTS (2011)
Jiri Jenícek, Martin Rozkovec, Ondrej Novák
Test vector overlapping based compression tool for narrow test access mechanism. DDECS (2011)
Jiri Jenícek, Ondrej Novák
COMPAS - Advanced test compressor. EWDTS (2010)
Martin Rozkovec, Jiri Jenícek, Ondrej Novák
Application dependent FPGA testing method using compressed deterministic test vectors. IOLTS (2010)
Martin Rozkovec, Jiri Jenícek, Ondrej Novák
Application Dependent FPGA Testing Method. DSD (2010)
Jiri Jenícek
Efficient Test Pattern Compression Method Using Hard Fault Preferring. DSD (2008)
Jiri Jenícek, Ondrej Novák
Test Pattern Compression Based on Pattern Overlapping. DDECS (2007)
Ondrej Novák, Zdenek Plíva, Jiri Jenícek, Zbynek Mader, Michal Jarkovský
Self Testing SoC with Reduced Memory Requirements and Minimized Hardware Overhead. DFT (2006)