Jian Wang

Publication Activity (10 Years)

Years Active: 2011-2024
Publications (10 Years): 27

Top Topics

Data Transmission

Scales Linearly

Top Venues

IEICE Electron. Express

ACM Great Lakes Symposium on VLSI

Publications

Jiacheng Cao, Wei Xiong, Jie Lu, Peilin Chen, Jian Wang, Jinmei Lai, Miaoqing Huang
An optimized EEGNet processor for low-power and real-time EEG classification in wearable brain-computer interfaces. Microelectron. J. 145 (2024)
YaoZhang Liu, Wei Xiong, Jian Wang, Jin-Mei Lai
A new model for parametrically evaluating the routability of GRM FPGA. IEICE Electron. Express 21 (3) (2024)
Wei Xiong, Jiacheng Cao, Yaozhang Liu, Jian Wang, Jinmei Lai, Miaoqing Huang
A Reliable and Efficient Online Solution for Adaptive Voltage and Frequency Scaling on FPGAs. IEEE Trans. Very Large Scale Integr. Syst. 32 (6) (2024)
Wei Xiong, Yanze Li, Changpeng Sun, Huanlin Luo, Jiafeng Liu, Jian Wang, Jinmei Lai, Gang Qu
An Effective Test Method for Block RAMs in Heterogeneous FPGAs Based on a Novel Partial Bitstream Relocation Technique. ACM Great Lakes Symposium on VLSI (2022)
Yanze Li, Yufan Zhang, Jiafeng Liu, Jian Wang, Jinmei Lai, Gang Qu
AutoTEA: Automated Transistor-level Efficient and Accurate Optimization for GRM FPGA Design. FCCM (2021)
Chengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai
A Tile-based Interconnect Model for FPGA Architecture Exploration. ACM Great Lakes Symposium on VLSI (2020)
Yufan Zhang, Zhengjie Li, Jian Wang, Jinmei Lai
FPTLOPT: An Automatic Transistor-Level Optimization Tool for GRM FPGA. FPGA (2020)
Jia-Bao Gao, Jian Wang, Md Tanvir Arafin, Jin-Mei Lai
FABLE-DTS: Hardware-Software Co-Design of a Fast and Stable Data Transmission System for FPGAs. SoCC (2020)
Chengyu Hu, Qinghua Duan, Peng Lu, Wei Liu, Jian Wang, Jinmei Lai
INTB: A New FPGA Interconnect Model for Architecture Exploration. FPGA (2020)
Xinyu He, Xie Xie, Jinmei Lai, Jian Wang
A Web-based Waveform Viewer for BR0101 Chip Testing Platform. ASICON (2019)
Xie Xie, Qinghua Duan, Jiafeng Liu, Jian Wang, Jinmei Lai
Design and implementation of Serial ATA pbysical layer on FPGA. ASICON (2019)
Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Jian Wang, Jinmei Lai
Transistor-Level Optimization Methodology for GRM FPGA Interconnect Circuits. FPGA (2019)
Zhi-Yin Lu, Jia-Feng Liu, Yunbing Pang, Zheug-Jie Li, Yufan Zhang, Jin-Mei Lai, Jian Wang
A Low-delay Configurable Register for FPGA. ASICON (2019)
Jiafeng Liu, Zhiyin Lu, Xie Xie, Jian Wang, Jinmei Lai
An Exponential Dynamic Weighted Fair Queuing Algorithm for Task Scheduling in Chip Verification Platform. ASICON (2019)
Zhengjie Li, Yuanlong Xiao, Yufan Zhang, Yunbing Pang, Chengyu Hu, Jian Wang, Jinmei Lai
An Automatic Transistor-Level Tool for GRM FPGA Interconnect Circuits Optimization. ACM Great Lakes Symposium on VLSI (2019)
Chengyu Hu, Qinghua Duan, Liran Hu, Peng Lu, Zhengjie Li, Meng Yang, Jian Wang, Jinmei Lai
An Analytical-based Hybrid Algorithm for FPGA Placement. ACM Great Lakes Symposium on VLSI (2019)
Hanyang Xu, Jian Wang, Jinmei Lai
Design of a power efficient self-adaptive LVDS driver. IEICE Electron. Express 15 (5) (2018)
Chengyu Hu, Peng Lu, Meng Yang, Jian Wang, Jinmei Lai
A SA-based parallel method for FPGA placement. IEICE Electron. Express 15 (24) (2018)
Yuchen Yao, Zhiqian Zhang, Zhen Yang, Jian Wang, Jinmei Lai
FPGA-based convolution neural network for traffic sign recognition. ASICON (2017)
Chuanliang Kang, Pei Yang, Jian Wang, Jinmei Lai
A deep research on the chip verification platform based on network. ASICON (2017)
Jiaqi Gu, Ruoyao Wang, Jian Wang, Jinmei Lai, Qinghua Duan
Remote embedded simulation system for SW/HW co-design based on dynamic partial reconfiguration. ASICON (2017)
Zhen Yang, Jian Wang, Meng Yang, Jinmei Lai
Testing FPGA Local Interconnects Based on Repeatable Configuration Modules (Abstract Only). FPGA (2016)
Yuanlong Xiao, Jian Wang, Jinmei Lai
A universal automatic on-chip measurement of FPGA's internal setup and hold times. IEICE Electron. Express 13 (23) (2016)
Hanyang Xu, Jian Wang, Jinmei Lai
Prototyping design of a flexible DSP block with pipeline structure for FPGA. IEICE Electron. Express 13 (17) (2016)
Yuanpei Gao, Haijiang Ye, Jian Wang, Jinmei Lai
FPGA bitstream compression and decompression based on LZ77 algorithm and BMC technique. ASICON (2015)
Yuanlong Xiao, Jian Wang, Jinmei Lai
A power efficient current-mode differential driver for FPGAs. ASICON (2015)
Zhen Yang, Chuanzeng Liang, Jian Wang, Jinmei Lai
A new automatic method for testing interconnect resources in FPGAs based on general routing matrix. IEICE Electron. Express 12 (20) (2015)
Lei Li, Jian Wang, Jinmei Lai
Novel FPGA clock network with low latency and skew (abstract only). FPGA (2014)
Hanyang Xu, Jian Wang, Meilai Jin
A FPGA prototype design emphasis on low power technique. FPGA (2014)
Chun Zhu, Jian Wang, Jinmei Lai
A novel net-partition-based multithread FPGA routing method. FPL (2013)
Lei Li, Jian Wang, Jinmei Lai
Improved unified interconnect unit for high speed and scalable FPGA. ASICON (2013)
Huagang Li, Jian Wang, Jinmei Lai
Weight-based FPGA placement algorithm with wire effect considered. ASICON (2013)
Xinrui Zhang, Jian Wang, Dan Chen, Jinmei Lai, Lichun Bao, Xueling Liu
The timing control design of 65nm block RAM in FPGA. ASICON (2013)
Chun Zhu, Qiuli Li, Jian Wang, Jinmei Lai
A novel multithread routing method for FPGAs (abstract only). FPGA (2013)
Xinrui Zhang, Liguang Chen, Liyun Wang, Jian Wang, Jinmei Lai
The design and verification of SEU-hardened configurable DFF. ASICON (2011)
Xiangzhi Meng, Liguang Chen, Hao Zhou, Jian Wang, Meng Yang, Jinmei Lai
FPGA interconnect timing library based on the statistical method. ASICON (2011)
Lei Li, Jian Wang, Yuan Wang, Jinmei Lai
Research on design method of scalable Configurable IP Core. AHS (2011)