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Ilias Chlis
ORCID
Publication Activity (10 Years)
Years Active: 2012-2021
Publications (10 Years): 10
Top Topics
Low Voltage
Hd Video
Frequency Modulation
Flip Flops
Top Venues
Int. J. Circuit Theory Appl.
ICECS
IEEE Trans. Circuits Syst. I Regul. Pap.
ISSCC
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Publications
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Jay Im
,
Kevin Zheng
,
Chuen-Huei Adam Chou
,
Lei Zhou
,
Jae Wook Kim
,
Stanley Chen
,
Yipeng Wang
,
Hao-Wei Hung
,
Kee Hian Tan
,
Winson Lin
,
Arianne Roldan
,
Declan Carey
,
Ilias Chlis
,
Ronan Casey
,
Ade Bekele
,
Ying Cao
,
David Mahashin
,
Hong Ahn
,
Hongtao Zhang
,
Yohan Frans
,
Ken Chang
A 112-Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR ADC and Inverter-Based RX Analog Front-End in 7-nm FinFET.
IEEE J. Solid State Circuits
56 (1) (2021)
Jay Im
,
Kevin Zheng
,
Adam Chou
,
Lei Zhou
,
Jae Wook Kim
,
Stanley Chen
,
Yipeng Wang
,
Hao-Wei Hung
,
Kee Hian Tan
,
Winson Lin
,
Arianne Roldan
,
Declan Carey
,
Ilias Chlis
,
Ronan Casey
,
Ade Bekele
,
Ying Cao
,
David Mahashin
,
Hong Ahn
,
Hongtao Zhang
,
Yohan Frans
,
Ken Chang
6.1 A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET.
ISSCC
(2020)
James Hudner
,
Declan Carey
,
Ronan Casey
,
Kay Hearne
,
Pedro Wilson de Abreu Farias Neto
,
Ilias Chlis
,
Marc Erett
,
Chi Fung Poon
,
Asma Laraba
,
Hongtao Zhang
,
Sai Lalith Chaitanya Ambatipudi
,
David Mahashin
,
Parag Upadhyaya
,
Yohan Frans
,
Ken Chang
A 112GB/S PAM4 Wireline Receiver Using a 64-Way Time-Interleaved SAR ADC in 16NM FinFET.
VLSI Circuits
(2018)
Domenico Pepe
,
Ilias Chlis
,
Domenico Zito
Transformer-Based Input Integrated Matching in Cascode Amplifiers: Analytical Proofs.
IEEE Trans. Circuits Syst. I Regul. Pap.
(5) (2018)
Ilias Chlis
,
Domenico Pepe
,
Domenico Zito
Transformer-coupled π-network differential CMOS oscillator circuit topology.
Int. J. Circuit Theory Appl.
45 (3) (2017)
Ilias Chlis
,
Domenico Pepe
,
Domenico Zito
Analyses and techniques for phase noise reduction in CMOS Hartley oscillator topology.
Int. J. Circuit Theory Appl.
45 (12) (2017)
Ilias Chlis
,
Domenico Pepe
,
Domenico Zito
Phase noise analysis in CMOS differential Armstrong oscillator topology.
Int. J. Circuit Theory Appl.
44 (9) (2016)
Ilias Chlis
,
Domenico Pepe
,
Domenico Zito
Analyses and techniques for phase noise reduction in CMOS Colpitts oscillator topology.
Int. J. Circuit Theory Appl.
44 (3) (2016)
Domenico Pepe
,
Ilias Chlis
,
Domenico Zito
67 GHz three-spiral transformer CMOS oscillator.
Int. J. Circuit Theory Appl.
44 (10) (2016)
Ilias Chlis
,
Domenico Pepe
,
Domenico Zito
Analysis of Phase Noise in 28 nm CMOS LC Oscillator Differential Topologies: Armstrong, Colpitts, Hartley and Common-Source Cross-Coupled Pair.
J. Circuits Syst. Comput.
24 (4) (2015)
Athanasios Dimakos
,
Matthias Bucher
,
Rupendra Kumar Sharma
,
Ilias Chlis
Ultra-low voltage drain-bulk connected MOS transistors in weak and moderate inversion.
ICECS
(2012)